參數(shù)資料
型號(hào): SAL-XC886C-8FFA5V
廠商: INFINEON TECHNOLOGIES AG
元件分類: 微控制器/微處理器
英文描述: 8-BIT, FLASH, 80 MHz, MICROCONTROLLER, PQFP48
封裝: GREEN, PLASTIC, TQFP-48
文件頁數(shù): 108/134頁
文件大?。?/td> 864K
代理商: SAL-XC886C-8FFA5V
SAL-XC886CLM
Functional Description
Data Sheet
68
V1.0, 2010-05
3.7.1
Module Reset Behavior
Table 21 lists the functions of the SAL-XC886 and the various reset types that affect
these functions. The symbol “■” signifies that the particular function is reset to its default
state.
3.7.2
Booting Scheme
When the SAL-XC886 is reset, it must identify the type of configuration with which to start
the different modes once the reset sequence is complete. Thus, boot configuration
information that is required for activation of special modes and conditions needs to be
applied by the external world through input pins. After power-on reset or hardware reset,
the pins MBC, TMS and P0.0 collectively select the different boot options. Table 22
shows the available boot options in the SAL-XC886.
Table 21
Effect of Reset on Device Functions
Module/
Function
Wake-Up
Reset
Watchdog
Reset
Hardware
Reset
Power-On
Reset
Brownout
Reset
CPU Core
■■■■■
Peripherals
■■■■■
On-Chip
Static RAM
Not affected,
Reliable
Not affected,
Reliable
Not affected,
Reliable
Affected, un-
reliable
Affected, un-
reliable
Oscillator,
PLL
Not affected ■■■
Port Pins
■■■■■
EVR
The voltage
regulator is
switched on
Not affected ■■■
FLASH
■■■■■
NMI
Disabled
■■■
Table 22
SAL-XC886 Boot Selection
MBC
TMS
P0.0
Type of Mode
PC Start Value
1
0
X
User Mode
1); on-chip OSC/PLL non-bypassed 0000
H
0
X
BSL Mode; on-chip OSC/PLL non-bypassed
2)
0000
H
0
1
0
OCDS Mode; on-chip OSC/PLL non-
bypassed
0000
H
1
0
User (JTAG) Mode
3); on-chip OSC/PLL non-
bypassed (normal)
0000
H
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