參數(shù)資料
型號： SAK-XE169FH-136F100L
廠商： INFINEON TECHNOLOGIES AG
元件分類： 微控制器/微處理器
英文描述： 16-BIT, FLASH, 100 MHz, RISC MICROCONTROLLER, PQFP176
封裝： 0.50 MM PITCH, GREEN, PLASTIC, LQFP-176
文件頁數(shù)： 20/150頁
文件大小： 1805K
代理商： SAK-XE169FH-136F100L
XE169FH
XC2000 Family Derivatives / High Line
Electrical Parameters
Data Sheet
116
V1.2, 2010-09
Direct Drive
When direct drive operation is selected (SYSCON0.CLKSEL = 11
B), the system clock is
derived directly from the input clock signal CLKIN1:
f
SYS = fIN.
The frequency of
f
SYS is the same as the frequency of fIN. In this case the high and low
times of
f
SYS are determined by the duty cycle of the input clock fIN.
Selecting Bypass Operation from the XTAL1
1) input and using a divider factor of 1 results
in a similar configuration.
Prescaler Operation
When prescaler operation is selected (SYSCON0.CLKSEL = 10
B, PLLCON0.VCOBY =
1
B), the system clock is derived either from the crystal oscillator (input clock signal
XTAL1) or from the internal clock source through the output prescaler K1 (= K1DIV+1):
f
SYS = fOSC / K1.
If a divider factor of 1 is selected, the frequency of
f
SYS equals the frequency of fOSC. In
this case the high and low times of
f
SYS are determined by the duty cycle of the input
clock
f
OSC (external or internal).
The lowest system clock frequency results from selecting the maximum value for the
divider factor K1:
f
SYS = fOSC / 1024.
4.7.2.1
Phase Locked Loop (PLL)
When PLL operation is selected (SYSCON0.CLKSEL = 10
B, PLLCON0.VCOBY = 0B),
the on-chip phase locked loop is enabled and provides the system clock. The PLL
multiplies the input frequency by the factor F (
f
SYS = fIN × F).
F is calculated from the input divider P (= PDIV+1), the multiplication factor N (=
NDIV+1), and the output divider K2 (= K2DIV+1):
(F = N / (P
× K2)).
The input clock can be derived either from an external source at XTAL1 or from the on-
chip clock source.
The PLL circuit synchronizes the system clock to the input clock. This synchronization is
performed smoothly so that the system clock frequency does not change abruptly.
Adjustment to the input clock continuously changes the frequency of
f
SYS so that it is
locked to
f
IN. The slight variation causes a jitter of fSYS which in turn affects the duration
of individual TCSs.
1) Voltages on XTAL1 must comply to the core supply voltage
V
DDIM.
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
SAK-XE169FH-136F100L AA 功能描述:16位微控制器 - MCU 16-Bit Single-Chip RealTime Signal Ctrl RoHS:否 制造商:Texas Instruments 核心:RISC 處理器系列:MSP430FR572x 數(shù)據(jù)總線寬度:16 bit 最大時(shí)鐘頻率:24 MHz 程序存儲器大小:8 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:2 V to 3.6 V 工作溫度范圍:- 40 C to + 85 C 封裝 / 箱體:VQFN-40 安裝風(fēng)格:SMD/SMT
SAK-XE169FH-136F100L AB 功能描述:16位微控制器 - MCU 16-Bit Single-Chip RealTime Signal Ctrl RoHS:否 制造商:Texas Instruments 核心:RISC 處理器系列:MSP430FR572x 數(shù)據(jù)總線寬度:16 bit 最大時(shí)鐘頻率:24 MHz 程序存儲器大小:8 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:2 V to 3.6 V 工作溫度范圍:- 40 C to + 85 C 封裝 / 箱體:VQFN-40 安裝風(fēng)格:SMD/SMT
SAK-XE169FH-200F100L AA 功能描述:16位微控制器 - MCU 16-Bit Single-Chip RealTime Signal Ctrl RoHS:否 制造商:Texas Instruments 核心:RISC 處理器系列:MSP430FR572x 數(shù)據(jù)總線寬度:16 bit 最大時(shí)鐘頻率:24 MHz 程序存儲器大小:8 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:2 V to 3.6 V 工作溫度范圍:- 40 C to + 85 C 封裝 / 箱體:VQFN-40 安裝風(fēng)格:SMD/SMT
SAK-XE169FH-200F100L AB 功能描述:16位微控制器 - MCU 16-Bit Single-Chip RealTime Signal Ctrl RoHS:否 制造商:Texas Instruments 核心:RISC 處理器系列:MSP430FR572x 數(shù)據(jù)總線寬度:16 bit 最大時(shí)鐘頻率:24 MHz 程序存儲器大小:8 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:2 V to 3.6 V 工作溫度范圍:- 40 C to + 85 C 封裝 / 箱體:VQFN-40 安裝風(fēng)格:SMD/SMT
SAL 制造商:SHARMA 制造商全稱:Sharma Electro Components,Inc 功能描述:Tantalum Capacitors
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