參數(shù)資料
型號: SAK-XC2785X-72F80L
廠商: INFINEON TECHNOLOGIES AG
元件分類: 微控制器/微處理器
英文描述: 32-BIT, FLASH, 80 MHz, RISC MICROCONTROLLER, PQFP144
封裝: 0.50 MM PITCH, GREEN, PLASTIC, LQFP-144
文件頁數(shù): 50/141頁
文件大?。?/td> 1793K
代理商: SAK-XC2785X-72F80L
XC2785X
XC2000 Family / Base Line
General Device Information
Data Sheet
16
V2.1, 2011-07
6TRST
IIn/B
Test-System Reset Input
For normal system operation, pin TRST should be
held low. A high level at this pin at the rising edge
of PORST activates the XC2785X’s debug
system. In this case, pin TRST must be driven low
once to reset the debug system.
An internal pull-down device will hold this pin low
when nothing is driving it.
7
P8.3
O0 / I St/B
Bit 3 of Port 8, General Purpose Input/Output
CCU60_COU
T60
O1
St/B
CCU60 Channel 0 Output
CCU62_CC6
0
O2
St/B
CCU62 Channel 0 Output
TDI_D
IH
St/B
JTAG Test Data Input
If JTAG pos. D is selected during start-up, an
internal pull-up device will hold this pin low when
nothing is driving it.
CCU62_CC6
0INB
ISt/B
CCU62 Channel 0 Input
8
P7.0
O0 / I St/B
Bit 0 of Port 7, General Purpose Input/Output
T3OUT
O1
St/B
GPT12E Timer T3 Toggle Latch Output
T6OUT
O2
St/B
GPT12E Timer T6 Toggle Latch Output
TDO_A
OH /
IH
St/B
JTAG Test Data Output / DAP1 Input/Output
If DAP pos. 0 or 2 is selected during start-up, an
internal pull-down device will hold this pin low
when nothing is driving it.
ESR2_1
I
St/B
ESR2 Trigger Input 1
Table 6
Pin Definitions and Functions (cont’d)
Pin
Symbol
Ctrl.
Type Function
相關(guān)PDF資料
PDF描述
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