參數(shù)資料
型號(hào)： SAK-XC2768X-136F128L
廠商： INFINEON TECHNOLOGIES AG
元件分類： 微控制器/微處理器
英文描述： 32-BIT, FLASH, 128 MHz, RISC MICROCONTROLLER, PQFP100
封裝： 0.50 MM PITCH, GREEN, PLASTIC, LQFP-100
文件頁數(shù)： 5/131頁
文件大?。?/td> 1711K
代理商： SAK-XC2768X-136F128L
XC2768X
XC2000 Family Derivatives / Premium Line
Electrical Parameters
Preliminary
Data Sheet
102
V1.0, 2010-12
The timing in the AC Characteristics refers to TCSs. Timing must be calculated using the
minimum TCS possible under the given circumstances.
The actual minimum value for TCS depends on the jitter of the PLL. Because the PLL is
constantly adjusting its output frequency to correspond to the input frequency (from
crystal or oscillator), the accumulated jitter is limited. This means that the relative
deviation for periods of more than one TCS is lower than for a single TCS (see formulas
and Figure 4).
This is especially important for bus cycles using waitstates and for the operation of
timers, serial interfaces, etc. For all slower operations and longer periods (e.g. pulse train
generation or measurement, lower baudrates, etc.) the deviation caused by the PLL jitter
is negligible.
The value of the accumulated PLL jitter depends on the number of consecutive VCO
output cycles within the respective timeframe. The VCO output clock is divided by the
output prescaler K2 to generate the system clock signal
f
SYS. The number of VCO cycles
is K2
× T, where T is the number of consecutive f
SYS cycles (TCS).
PLL frequency band selection
Different frequency bands can be selected for the VCO so that the operation of the PLL
can be adjusted to a wide range of input and output frequencies:
Table 26
PLL Low-Jitter Parameters
Parameter
Symbol
Values
Unit
Note /
Test Condition
Min.
Typ.
Max.
VCO output frequency
(VCO controlled)
f
VCA CC
480
480
MHz
VCO output frequency
(VCO free-running)
f
VCA CC
80
340
MHz
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