參數(shù)資料
型號： SAK-TC1782-320F180HL
廠商： INFINEON TECHNOLOGIES AG
元件分類： 微控制器/微處理器
英文描述： 32-BIT, FLASH, 180 MHz, RISC MICROCONTROLLER, PQFP176
封裝： GREEN, PLASTIC, LQFP-176
文件頁數(shù)： 96/113頁
文件大?。?/td> 3371K
代理商： SAK-TC1782-320F180HL
TC1782
Electrical ParametersAC Parameters
Target Data Sheet/ACDC Target Specification 42
V 0.7 Preliminary, 2010-03
1.3.4
Phase Locked Loop (PLL)
Phase Locked Loop Operation
When PLL operation is enabled and configured, the PLL clock
f
VCO (and with it the LMB-
Bus clock
f
LMB) is constantly adjusted to the selected frequency. The PLL is constantly
adjusting its output frequency to correspond to the input frequency (from crystal or clock
source), resulting in an accumulated jitter that is limited. This means that the relative
deviation for periods of more than one clock cycle is lower than for a single clock cycle.
This is especially important for bus cycles using wait states and for the operation of
timers, serial interfaces, etc. For all slower operations and longer periods (e.g. pulse train
generation or measurement, lower baudrates, etc.) the deviation caused by the PLL jitter
is negligible.
Two formulas are defined for the (absolute) approximate maximum value of jitter
D
m in
[ns] dependent on the K2 - factor, the LMB clock frequency
f
LMB in [MHz], and the
number
m of consecutive f
LMB clock periods.
(2)
(3)
With rising number
m of clock cycles the maximum jitter increases linearly up to a value
of
m that is defined by the K2-factor of the PLL. Beyond this value of m the maximum
Table 19
PLL_SysClk Parameters
Parameter
Symbol
Values
Unit
Note /
Test Condition
Min.
Typ.
Max.
Accumulated Jitter
D
P CC
-7
7ns
PLL base frequency
f
PLLBASE
CC
50
200
320
MHz
VCO input frequency
f
REF CC
8
16
MHz
VCO frequency range
f
VCO CC
400
720
MHz
PLL lock-in time
t
L CC
200
μs
for
K2
100
≤
()
and
m
f
LMB MHz
[]
() 2
≤
()
Dmns
[]
740
K2
f
LMB MHz
[]
×
---------------------------------------------5
+
10 01
,
K2
×
–
()
m1
–
()
×
05
,
f
LMB MHz
[] 1
–
×
----------------------------------------------------------------
0 01
,
K2
×
+
×
=
else
Dmns
[]
740
K2
f
LMB MHz
[]
×
---------------------------------------------5
+
=
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