參數(shù)資料
型號(hào): SAK-C164CH-8FM
廠商: INFINEON TECHNOLOGIES AG
元件分類: 微控制器/微處理器
英文描述: 16-BIT, FLASH, 25 MHz, MICROCONTROLLER, PQFP80
封裝: 0.65 MM PITCH, METRIC, PLASTIC, QFP-80
文件頁(yè)數(shù): 16/74頁(yè)
文件大小: 917K
代理商: SAK-C164CH-8FM
&
Data Sheet
21
1999-08
The Capture/Compare Unit CAPCOM6
The CAPCOM6 unit supports generation and control of timing sequences on up to three
16-bit capture/compare channels plus one 10-bit compare channel.
In compare mode the CAPCOM6 unit provides two output signals per channel which
have inverted polarity and non-overlapping pulse transitions. The compare channel can
generate a single PWM output signal and is further used to modulate the capture/
compare output signals.
In capture mode the contents of compare timer 12 is stored in the capture registers upon
a signal transition at pins CCx.
Compare timers T12 (16-bit) and T13 (10-bit) are free running timers which are clocked
by the prescaled CPU clock.
Figure 5
CAPCOM6 Block Diagram
For motor control applications both subunits may generate versatile multichannel PWM
signals which are basically either controlled by compare timer 12 or by a typical hall
sensor pattern at the interrupt inputs (block commutation).
Note: Multichannel signal generation is provided only in devices with a full CAPCOM6.
1)
These registers are not directly accessible. The period and offset registers are loading a value into the
timer registers.
The shaded blocks are available in the full function module only.
Co
n
tro
l
CC Channel 0
CC60
CC Channel 1
CC61
CC Channel 2
CC62
MCB04109.VSD
P
re
sca
le
r
Offset Register
T12OF
Compare
Timer T12
16-bit
1)
Period Register
T12P
Mode Select Reg.
CC6MSEL
Trap Register
Port
Control
Logic
Control Register
CTCON
Compare Register
CMP13
P
re
sca
le
r
Compare
Timer T13
10-bit
1)
Period Register
T13P
Block
Commutation
Control
CC6MCON.H
CC60
COUT60
CC61
COUT61
CC62
COUT62
COUT63
CTRAP
CC6POS0
CC6POS1
CC6POS2
f
CPU
f
CPU
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