參數(shù)資料
型號(hào): SAF82525N
廠商: INFINEON TECHNOLOGIES AG
英文描述: Data Communications ICs
中文描述: 數(shù)據(jù)通信集成電路
文件頁數(shù): 96/126頁
文件大小: 730K
代理商: SAF82525N
Semiconductor Group
96
SAB 82525
SAB 82526
SAF 82525
SAF 82526
In operating modes which provide high byte address recognition, the HSCX compares the
high byte of a 2-bytes address with the contents of two individual programmable registers
(RAH1, RAH2) and the fixed values FE
H
and FC
H
(group address).
Dependent on the result of this comparison, the following bit combinations are possible:
10 … RAH1 has been recognized
00 … RAH2 has been recognized
01 … group address has been recognized
HA1, HA0 … High Byte Address Compare; significant only if 2-byte address mode has
been selected.
If RAH1, RAH2 contain the identical values, the combination 00 will be omitted.
Note:
C/R … Command/Response; significant only, if 2-byte address mode has been selected.
Value of the C/R bit (bit of high address byte) in the received frame. The interpretation
depends on the setting of the CRI bit in the RAH1 register. Refer also to the description of
RAH1 register.
LA … Low Byte Address Compare; not significant in transparent and extended
transparent operating modes.
The low byte address of a 2-byte address field, or the single address byte of a 1-byte
address field is compared with two programmable registers (RAL1, RAL2)
0 … RAL2 has been recognized
1 … RAL1 has been recognized
According to the X.25 LAPB protocol, RAL1 is interpreted as COMMAND and RAL2
interpreted as RESPONSE.
RSTA corresponds to the last received HDLC frame; it is duplicated into RFIFO for
every frame (last byte of frame).
Note:
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