參數(shù)資料
型號: SAF-XC2387-72F66L
廠商: INFINEON TECHNOLOGIES AG
元件分類: 微控制器/微處理器
英文描述: 32-BIT, FLASH, 66 MHz, RISC MICROCONTROLLER, PQFP144
封裝: GREEN, PLASTIC, LQFP-144
文件頁數(shù): 17/120頁
文件大?。?/td> 1432K
代理商: SAF-XC2387-72F66L
XC2387
XC2000 Family Derivatives
Electrical Parameters
Data Sheet
111
V2.1, 2008-08
Table 34
SSC Master/Slave Mode Timing for Lower Voltage Range
(Operating Conditions apply),
C
L = 50 pF
Parameter
Symbol
Values
Unit Note /
Test Co
ndition
Min.
Typ.
Max.
Master Mode Timing
Slave select output SELO active
to first SCLKOUT transmit edge
t
1 CC
0
1)
1) The maximum value further depends on the settings for the slave select output leading delay.
ns
2)
tSYS =1/fSYS (= 12.5ns @ 80 MHz)
Slave select output SELO inactive
after last SCLKOUT receive edge
t
2 CC
0.5
×
t
BIT
3)
3) The maximum value depends on the settings for the slave select output trailing delay and for the shift clock
output delay.
ns
Transmit data output valid time
t
3 CC
-13
16
ns
Receive data input setup time to
SCLKOUT receive edge
t
4 SR
48
ns
Data input DX0 hold time from
SCLKOUT receive edge
t
5 SR
-11
ns
Slave Mode Timing
Select input DX2 setup to first
clock input DX1 transmit edge
t
10 SR
12
ns
4)
4) These input timings are valid for asynchronous input signal handling of slave select input, shift clock input, and
receive data input (bits DXnCR.DSEN = 0).
Select input DX2 hold after last
clock input DX1 receive edge
t
11 SR
8––ns
Data input DX0 setup time to
clock input DX1 receive edge
t
12 SR
12
ns
Data input DX0 hold time from
clock input DX1 receive edge
t
13 SR
8––ns
Data output DOUT valid time
t
14 CC
11
44
ns
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