參數(shù)資料
型號： SAF-XC2264-72F66L
廠商： INFINEON TECHNOLOGIES AG
元件分類： 微控制器/微處理器
英文描述： 32-BIT, FLASH, 66 MHz, MICROCONTROLLER, PQFP100
封裝： 0.50 MM PITCH, GREEN, PLASTIC, LQFP-100
文件頁數(shù)： 115/116頁
文件大?。?/td> 1516K
代理商： SAF-XC2264-72F66L
XC2267 / XC2264
XC2000 Family Derivatives
Electrical Parameters
Data Sheet
96
V2.1, 2008-08
4.6.3
External Clock Input Parameters
These parameters specify the external clock generation for the XC226x. The clock can
be generated in two ways:
By connecting a crystal or ceramic resonator to pins XTAL1/XTAL2.
By supplying an external clock signal. This clock signal can be supplied either to
pin XTAL1 (core voltage domain) or to pin CLKIN1 (IO voltage domain).
If connected to CLKIN1, the input signal must reach the defined input levels
V
IL and VIH.
In connected to XTAL1, a minimum amplitude
V
AX1 (peak-to-peak voltage) is sufficient
for the operation of the on-chip oscillator.
Note: The given clock timing parameters (
t
1 … t4) are only valid for an external clock
input signal.
Table 26
External Clock Input Characteristics
(Operating Conditions apply)
Parameter
Symbol
Limit Values
Unit Note / Test
Condition
Min.
Typ.
Max.
Input voltage range limits
for signal on XTAL1
V
IX1 SR
-1.7 +
V
DDI
–1.7
V
1)
1) Overload conditions must not occur on pin XTAL1.
Input voltage (amplitude)
on XTAL1
V
AX1 SR
0.3
×
V
DDI
–
V
Peak-to-peak
voltage2)
2) The amplitude voltage
VAX1 refers to the offset voltage VOFF. This offset voltage must be stable during the
operation and the resulting voltage peaks must remain within the limits defined by
V
IX1.
XTAL1 input current
I
IL CC
–
±20
A0 V < V
IN < VDDI
Oscillator frequency
f
OSC CC
4
–
40
MHz Clock signal
4
–
16
MHz Crystal or
Resonator
High time
t
1 SR
6
––ns
Low time
t
2 SR
6
––ns
Rise time
t
3 SR
–
88ns
Fall time
t
4 SR
–
88ns
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