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參數(shù)資料
| 型號： | SAF-XC161CJ-16F40F |
| 廠商： | INFINEON TECHNOLOGIES AG |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 16-BIT, FLASH, 40 MHz, MICROCONTROLLER, PQFP144 |
| 封裝： | 0.50 MM PITCH, GREEN, PLASTIC, TQFP-144 |
| 文件頁數(shù)： | 21/88頁 |
| 文件大?。?/td> | 1191K |
| 代理商： | SAF-XC161CJ-16F40F |
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XC161CJ-16F
Derivatives
Functional Description
Data Sheet
26
V2.4, 2006-08
3.4
Interrupt System
With an interrupt response time of typically 8 CPU clocks (in case of internal program
execution), the XC161 is capable of reacting very fast to the occurrence of non-
deterministic events.
The architecture of the XC161 supports several mechanisms for fast and flexible
response to service requests that can be generated from various sources internal or
external to the microcontroller. Any of these interrupt requests can be programmed to
being serviced by the Interrupt Controller or by the Peripheral Event Controller (PEC).
In contrast to a standard interrupt service where the current program execution is
suspended and a branch to the interrupt vector table is performed, just one cycle is
‘stolen’ from the current CPU activity to perform a PEC service. A PEC service implies a
single byte or word data transfer between any two memory locations with an additional
increment of either the PEC source, or the destination pointer, or both. An individual PEC
transfer counter is implicitly decremented for each PEC service except when performing
in the continuous transfer mode. When this counter reaches zero, a standard interrupt is
performed to the corresponding source related vector location. PEC services are very
well suited, for example, for supporting the transmission or reception of blocks of data.
The XC161 has 8 PEC channels each of which offers such fast interrupt-driven data
transfer capabilities.
A separate control register which contains an interrupt request flag, an interrupt enable
flag and an interrupt priority bitfield exists for each of the possible interrupt nodes. Via its
related register, each node can be programmed to one of sixteen interrupt priority levels.
Once having been accepted by the CPU, an interrupt service can only be interrupted by
a higher prioritized service request. For the standard interrupt processing, each of the
possible interrupt nodes has a dedicated vector location.
Fast external interrupt inputs are provided to service external interrupts with high
precision requirements. These fast interrupt inputs feature programmable edge
detection (rising edge, falling edge, or both edges).
Software interrupts are supported by means of the ‘TRAP’ instruction in combination with
an individual trap (interrupt) number.
Table 4 shows all of the possible XC161 interrupt sources and the corresponding
hardware-related interrupt flags, vectors, vector locations and trap (interrupt) numbers.
Note: Interrupt nodes which are not assigned to peripherals (unassigned nodes), may
be used to generate software controlled interrupt requests by setting the
respective interrupt request bit (xIR).
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| SAF-XC161CJ-16F40F BB | 功能描述:16位微控制器 - MCU 16 BIT SNGL CHIP 5V 40MHz Flash RoHS:否 制造商:Texas Instruments 核心:RISC 處理器系列:MSP430FR572x 數(shù)據(jù)總線寬度:16 bit 最大時鐘頻率:24 MHz 程序存儲器大小:8 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:2 V to 3.6 V 工作溫度范圍:- 40 C to + 85 C 封裝 / 箱體:VQFN-40 安裝風(fēng)格:SMD/SMT |
| SAFXC161CJ16F40FACT | 制造商:Infineon Technologies AG 功能描述:MCU 16-Bit XC166 CISC/DSP/RISC 128KB Flash 2.5V/5V 144-Pin TQFP T/R |
| SAFXC161CJ16F40FBB | 制造商:Infineon Technologies AG 功能描述:MCU 16-Bit XC166 CISC/DSP/RISC 128KB Flash 2.5V/5V 144-Pin TQFP |
| SAF-XC161CJ-16F40FBB | 功能描述:16位微控制器 - MCU 128KB Flash 8 KB RAM 2xASC 2xSSC SDLM I2C RoHS:否 制造商:Texas Instruments 核心:RISC 處理器系列:MSP430FR572x 數(shù)據(jù)總線寬度:16 bit 最大時鐘頻率:24 MHz 程序存儲器大小:8 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:2 V to 3.6 V 工作溫度范圍:- 40 C to + 85 C 封裝 / 箱體:VQFN-40 安裝風(fēng)格:SMD/SMT |
| SAFXC161CJ16F40FBB TR | 制造商:Infineon Technologies AG 功能描述: |
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