參數(shù)資料
型號(hào): SAF-XC161CJ-16F40F
廠商: INFINEON TECHNOLOGIES AG
元件分類: 微控制器/微處理器
英文描述: 16-BIT, FLASH, 40 MHz, MICROCONTROLLER, PQFP144
封裝: 0.50 MM PITCH, GREEN, PLASTIC, TQFP-144
文件頁(yè)數(shù): 20/88頁(yè)
文件大?。?/td> 1191K
代理商: SAF-XC161CJ-16F40F
XC161CJ-16F
Derivatives
Functional Description
Data Sheet
25
V2.4, 2006-08
and rotate instructions are always processed during one machine cycle independent of
the number of bits to be shifted. Also multiplication and most MAC instructions execute
in one single cycle. All multiple-cycle instructions have been optimized so that they can
be executed very fast as well: for example, a division algorithm is performed in 18 to 21
CPU cycles, depending on the data and division type. Four cycles are always visible, the
rest runs in the background. Another pipeline optimization, the branch target prediction,
allows eliminating the execution time of branch instructions if the prediction was correct.
The CPU has a register context consisting of up to three register banks with 16 wordwide
GPRs each at its disposal. The global register bank is physically allocated within the on-
chip DPRAM area. A Context Pointer (CP) register determines the base address of the
active global register bank to be accessed by the CPU at any time. The number of
register banks is only restricted by the available internal RAM space. For easy parameter
passing, a register bank may overlap others.
A system stack of up to 32 Kwords is provided as a storage for temporary data. The
system stack can be allocated to any location within the address space (preferably in the
on-chip RAM area), and it is accessed by the CPU via the stack pointer (SP) register.
Two separate SFRs, STKOV and STKUN, are implicitly compared against the stack
pointer value upon each stack access for the detection of a stack overflow or underflow.
The high performance offered by the hardware implementation of the CPU can efficiently
be utilized by a programmer via the highly efficient XC161 instruction set which includes
the following instruction classes:
Standard Arithmetic Instructions
DSP-Oriented Arithmetic Instructions
Logical Instructions
Boolean Bit Manipulation Instructions
Compare and Loop Control Instructions
Shift and Rotate Instructions
Prioritize Instruction
Data Movement Instructions
System Stack Instructions
Jump and Call Instructions
Return Instructions
System Control Instructions
Miscellaneous Instructions
The basic instruction length is either 2 or 4 bytes. Possible operand types are bits, bytes
and words. A variety of direct, indirect or immediate addressing modes are provided to
specify the required operands.
相關(guān)PDF資料
PDF描述
SAK-XC161CJ-16F20F 16-BIT, FLASH, 20 MHz, MICROCONTROLLER, PQFP144
SAF-XC164CM-8F40F 16-BIT, FLASH, 40 MHz, MICROCONTROLLER, PQFP64
SAK-XC164CM-8F40F 16-BIT, FLASH, 40 MHz, MICROCONTROLLER, PQFP64
SAK-XC164CM-8F20F 16-BIT, FLASH, 40 MHz, MICROCONTROLLER, PQFP64
SAF-XC164D-8R20F 16-BIT, MROM, 20 MHz, MICROCONTROLLER, PQFP100
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
SAF-XC161CJ-16F40F BB 功能描述:16位微控制器 - MCU 16 BIT SNGL CHIP 5V 40MHz Flash RoHS:否 制造商:Texas Instruments 核心:RISC 處理器系列:MSP430FR572x 數(shù)據(jù)總線寬度:16 bit 最大時(shí)鐘頻率:24 MHz 程序存儲(chǔ)器大小:8 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:2 V to 3.6 V 工作溫度范圍:- 40 C to + 85 C 封裝 / 箱體:VQFN-40 安裝風(fēng)格:SMD/SMT
SAFXC161CJ16F40FACT 制造商:Infineon Technologies AG 功能描述:MCU 16-Bit XC166 CISC/DSP/RISC 128KB Flash 2.5V/5V 144-Pin TQFP T/R
SAFXC161CJ16F40FBB 制造商:Infineon Technologies AG 功能描述:MCU 16-Bit XC166 CISC/DSP/RISC 128KB Flash 2.5V/5V 144-Pin TQFP
SAF-XC161CJ-16F40FBB 功能描述:16位微控制器 - MCU 128KB Flash 8 KB RAM 2xASC 2xSSC SDLM I2C RoHS:否 制造商:Texas Instruments 核心:RISC 處理器系列:MSP430FR572x 數(shù)據(jù)總線寬度:16 bit 最大時(shí)鐘頻率:24 MHz 程序存儲(chǔ)器大小:8 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:2 V to 3.6 V 工作溫度范圍:- 40 C to + 85 C 封裝 / 箱體:VQFN-40 安裝風(fēng)格:SMD/SMT
SAFXC161CJ16F40FBB TR 制造商:Infineon Technologies AG 功能描述: