參數(shù)資料
型號: SAF-XC161CJ-16F40F
廠商: INFINEON TECHNOLOGIES AG
元件分類: 微控制器/微處理器
英文描述: 16-BIT, FLASH, 40 MHz, MICROCONTROLLER, PQFP144
封裝: 0.50 MM PITCH, GREEN, PLASTIC, TQFP-144
文件頁數(shù): 15/88頁
文件大小: 1191K
代理商: SAF-XC161CJ-16F40F
XC161CJ-16F
Derivatives
Functional Description
Data Sheet
20
V2.4, 2006-08
3.1
Memory Subsystem and Organization
The memory space of the XC161 is configured in a Von Neumann architecture, which
means that all internal and external resources, such as code memory, data memory,
registers and I/O ports, are organized within the same linear address space. This
common memory space includes 16 Mbytes and is arranged as 256 segments of
64 Kbytes each, where each segment consists of four data pages of 16 Kbytes each.
The entire memory space can be accessed bytewise or wordwise. Portions of the on-
chip DPRAM and the register spaces (E/SFR) have additionally been made directly
bitaddressable.
The internal data memory areas and the Special Function Register areas (SFR and
ESFR) are mapped into segment 0, the system segment.
The Program Management Unit (PMU) handles all code fetches and, therefore, controls
accesses to the program memories, such as Flash memory and PSRAM.
The Data Management Unit (DMU) handles all data transfers and, therefore, controls
accesses to the DSRAM and the on-chip peripherals.
Both units (PMU and DMU) are connected via the high-speed system bus to exchange
data. This is required if operands are read from program memory, code or data is written
to the PSRAM, code is fetched from external memory, or data is read from or written to
external resources, including peripherals on the LXBus (such as TwinCAN). The system
bus allows concurrent two-way communication for maximum transfer performance.
128 Kbytes of on-chip Flash memory store code or constant data. The on-chip Flash
memory is organized as four 8-Kbyte sectors, one 32-Kbyte sector, and one 64-Kbyte
sector. Each sector can be separately write protected1), erased and programmed (in
blocks of 128 Bytes). The complete Flash area can be read-protected. A password
sequence temporarily unlocks protected areas. The Flash module combines very fast
64-bit one-cycle read accesses with protected and efficient writing algorithms for
programming and erasing. Thus, program execution out of the internal Flash results in
maximum performance. Dynamic error correction provides extremely high read data
security for all read accesses.
For timing characteristics, please refer to Section 4.4.2.
2 Kbytes of on-chip Program SRAM (PSRAM) are provided to store user code or data.
The PSRAM is accessed via the PMU and is therefore optimized for code fetches.
4 Kbytes of on-chip Data SRAM (DSRAM) are provided as a storage for general user
data. The DSRAM is accessed via the DMU and is therefore optimized for data
accesses.
2 Kbytes of on-chip Dual-Port RAM (DPRAM) are provided as a storage for user
defined variables, for the system stack, general purpose register banks. A register bank
can consist of up to 16 wordwide (R0 to R15) and/or bytewide (RL0, RH0, …, RL7, RH7)
1) Each two 8-Kbyte sectors are combined for write-protection purposes.
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
SAF-XC161CJ-16F40F BB 功能描述:16位微控制器 - MCU 16 BIT SNGL CHIP 5V 40MHz Flash RoHS:否 制造商:Texas Instruments 核心:RISC 處理器系列:MSP430FR572x 數(shù)據(jù)總線寬度:16 bit 最大時鐘頻率:24 MHz 程序存儲器大小:8 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:2 V to 3.6 V 工作溫度范圍:- 40 C to + 85 C 封裝 / 箱體:VQFN-40 安裝風(fēng)格:SMD/SMT
SAFXC161CJ16F40FACT 制造商:Infineon Technologies AG 功能描述:MCU 16-Bit XC166 CISC/DSP/RISC 128KB Flash 2.5V/5V 144-Pin TQFP T/R
SAFXC161CJ16F40FBB 制造商:Infineon Technologies AG 功能描述:MCU 16-Bit XC166 CISC/DSP/RISC 128KB Flash 2.5V/5V 144-Pin TQFP
SAF-XC161CJ-16F40FBB 功能描述:16位微控制器 - MCU 128KB Flash 8 KB RAM 2xASC 2xSSC SDLM I2C RoHS:否 制造商:Texas Instruments 核心:RISC 處理器系列:MSP430FR572x 數(shù)據(jù)總線寬度:16 bit 最大時鐘頻率:24 MHz 程序存儲器大小:8 KB 數(shù)據(jù) RAM 大小:1 KB 片上 ADC:Yes 工作電源電壓:2 V to 3.6 V 工作溫度范圍:- 40 C to + 85 C 封裝 / 箱體:VQFN-40 安裝風(fēng)格:SMD/SMT
SAFXC161CJ16F40FBB TR 制造商:Infineon Technologies AG 功能描述: