參數(shù)資料
型號: SAB-XC164SM-8F40F
廠商: INFINEON TECHNOLOGIES AG
元件分類: 微控制器/微處理器
英文描述: 16-BIT, FLASH, 40 MHz, MICROCONTROLLER, PQFP64
封裝: PLASTIC, TQFP-64
文件頁數(shù): 5/66頁
文件大?。?/td> 613K
代理商: SAB-XC164SM-8F40F
XC164SM
Derivatives
General Device Information
Data Sheet
11
V1.0, 2005-11
Port 3
P3.1
P3.2
P3.3
P3.4
P3.5
P3.6
P3.7
P3.8
P3.9
P3.10
P3.11
P3.13
P3.15
28-39,
42
28
29
30
31
32
33
34
35
36
37
38
39
42
IO
O
I/O
I
O
I
O
I
I/O
O
I
I/O
I
I/O
I
O
Port 3 is a 13-bit bidirectional I/O port. Each pin can be
programmed for input (output driver in high-impedance
state) or output (configurable as push/pull or open drain
driver). The input threshold of Port 3 is selectable (standard
or special).The following Port 3 pins also serve for alternate
functions:
T6OUT [GPT2] Timer T6 Toggle Latch Output,
RxD1 [ASC1] Data Input (Async.) or Inp./Outp. (Sync.),
EX1IN [Fast External Interrupt 1] Input (alternate pin A),
TCK [Debug System] JTAG Clock Input
CAPIN [GPT2] Register CAPREL Capture Input,
TDI [Debug System] JTAG Data In
T3OUT [GPT1] Timer T3 Toggle Latch Output,
TDO [Debug System] JTAG Data Out
T3EUD [GPT1] Timer T3 External Up/Down Control Input,
TMS [Debug System] JTAG Test Mode Selection
T4IN [GPT1] Timer T4 Count/Gate/Reload/Capture Inp
TxD1 [ASC0] Clock/Data Output (Async./Sync.),
BRKOUT [Debug System] Break Out
T3IN [GPT1] Timer T3 Count/Gate Input
T2IN [GPT1] Timer T2 Count/Gate/Reload/Capture Inp
BRKIN [Debug System] Break In
MRST0 [SSC0] Master-Receive/Slave-Transmit In/Out.
MTSR0 [SSC0] Master-Transmit/Slave-Receive Out/In.
TxD0 [ASC0] Clock/Data Output (Async./Sync.),
EX2IN [Fast External Interrupt 2] Input (alternate pin B)
RxD0 [ASC0] Data Input (Async.) or Inp./Outp. (Sync.),
EX2IN [Fast External Interrupt 2] Input (alternate pin A)
SCLK0 [SSC0] Master Clock Output / Slave Clock Input.,
EX3IN [Fast External Interrupt 3] Input (alternate pin A)
CLKOUT System Clock Output (= CPU Clock),
FOUT Programmable Frequency Output
Table 2-1
Pin Definitions and Functions (cont’d)
Sym-
bol
Pin
Num.
Input
Outp.
Function
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