參數(shù)資料
型號(hào): SAA7380
廠商: NXP Semiconductors N.V.
英文描述: Error correction and host interface IC for CD-ROM ELM
中文描述: 錯(cuò)誤更正和主機(jī)接口集成電路的CD - ROM榆木
文件頁數(shù): 40/60頁
文件大小: 227K
代理商: SAA7380
1996 Apr 25
40
Philips Semiconductors
Preliminary specification
Error correction and host interface IC for
CD-ROM (ELM)
SAA7380
WAIT
CONTROL DATA TRANSFER
; see Fig.18
t
0
t
1
t
2
t
3
t
4
HEN set-up
HEN hold
CMD set-up
CMD hold
HWR/HRD active
30
0
15
5
50
75
60
145
50
20
5
0
80
60
80
100
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
33 MHz clock
16 MHz clock
33 MHz clock
16 MHz clock
t
5
HWR/HRD inactive
t
6
t
7
t
8
t
9
t
10
t
11
t
12
HWR data set-up
HWR data hold
HRD data access
HRD data to 3-state
HWR/HRD to WAIT active
DTEN to HWR/HRD
HWR/HRD to DTEN inactive
for last data transferred;
33 MHz clock
16 MHz clock
only for last data access
145
120
120
ns
ns
ns
t
13
t
14
DRQ
CONTROL DATA TRANSFER
; see Fig.19
HWR/HRD to EOP
HWR/HRD inactive to EOP inactive only for last data access
t
0
t
1
t
2
t
3
t
4
HEN set-up
HEN hold
CMD set-up
CMD hold
HWR/HRD active
30
0
15
5
50
75
60
145
50
20
5
0
0
80
60
80
100
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
33 MHz clock
16 MHz clock
33 MHz clock
16 MHz clock
t
5
HWR/HRD data inactive
t
6
t
7
t
8
t
9
t
10
t
11
t
12
t
13
HWR data set-up
HWR data hold
HRD data access
HRD data to 3-state
DRQ to HWR/HRD
HWR/HRD to DRQ inactive
DTEN to HWR/HRD
HWR/HRD to DTEN inactive
for last data transferred;
33 MHz clock
16 MHz clock
only for last data access
145
120
ns
ns
t
14
HWR/HRD to EOP
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
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