參數(shù)資料
型號: SAA7327
廠商: NXP Semiconductors N.V.
英文描述: Digital servo processor and Compact Disc decoder with integrated DAC for video CD (CD7 II)(應(yīng)用于視頻CD的帶綜合數(shù)模轉(zhuǎn)換器(DAC)的數(shù)字伺服處理器和光盤譯碼器)
中文描述: 數(shù)字伺服處理器和光盤解碼器集成了用于視頻光盤(CD7抗原二)(應(yīng)用于視頻光碟的帶綜合數(shù)模轉(zhuǎn)換器(DAC)的的數(shù)字伺服處理器和光盤譯碼器援會)
文件頁數(shù): 57/68頁
文件大?。?/td> 284K
代理商: SAA7327
2000 Jun 26
57
Philips Semiconductors
Product specification
Digital servo processor and Compact Disc
decoder with integrated DAC for video CD (CD7 II)
SAA7327
12 OPERATING CHARACTERISTICS (MICROCONTROLLER INTERFACE TIMING)
V
DD
= 3.0 to 3.6 V; V
SS
= 0 V; T
amb
=
10 to +70
°
C; unless otherwise specified.
SYMBOL
PARAMETER
CONDITIONS
NORMAL MODE
LOCK-TO-DISC MODE
UNIT
MIN.
MAX.
MIN.
MAX.
Microcontroller interface timing (4-wire bus mode; writing to decoder registers 0 to F; reading Q-channel
subcode and decoder status);
see Figs 34 and 35; note 1
I
NPUTS
SCL
AND
RAB
t
CL
t
CH
t
r
t
f
R
EAD MODE
(C
L
= 20 pF)
t
dRD
delay time RAB to SDA
valid
t
PD
propagation delay SCL
to SDA
t
dRZ
delay time RAB to SDA
high-impedance
input LOW time
input HIGH time
rise time
fall time
480/n + 20
480/n + 20
480/n
480/n
2400/n + 20
2400/n + 20
ns
ns
ns
ns
480/n
480/n
50
50
ns
720/n
20
960/n + 20
720/n + 20
4800/n + 20 ns
50
50
ns
W
RITE MODE
(C
L
= 20 pF)
t
suD
set-up time SDA to SCL note 2
t
hD
hold time SCL to SDA
t
suCR
set-up time SCL to RAB
t
dWZ
delay time SDA
high-impedance to RAB
20
720/n
240/n + 20
0
960/n + 20
20
720/n
1200/n + 20
0
4800/n + 20 ns
ns
ns
ns
Microcontroller interface timing (4-wire bus mode; servo commands);
see Figs 36 and 37; notes 3 and 4
I
NPUTS
SCL
AND
SILD
t
L
t
H
t
r
t
f
R
EAD MODE
(C
L
= 20 pF)
t
dLD
delay time SILD to SDA
valid
t
PD
propagation delay SCL
to SDA
t
dLZ
delay time SILD to SDA
high-impedance
t
sCLR
set-up time SCL to
SILD
t
hCLR
hold time SILD to SCL
input LOW time
input HIGH time
rise time
fall time
710
710
240
240
710
710
240
240
ns
ns
ns
ns
25
25
ns
950
950
ns
50
50
ns
480
480
ns
830
830
ns
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