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參數(shù)資料
| 型號(hào)： | SAA7325H |
| 廠商： | NXP SEMICONDUCTORS |
| 元件分類： | 消費(fèi)家電 |
| 英文描述： | Digital servo processor and Compact Disc decoder with integrated DAC CD10 |
| 中文描述： | SPECIALTY CONSUMER CIRCUIT, PQFP64 |
| 封裝： | PLASTIC, SOT-393-1, QFP-64 |
| 文件頁數(shù)： | 17/68頁 |
| 文件大?。?/td> | 273K |
| 代理商： | SAA7325H |
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1999 Jun 17
17
Philips Semiconductors
Product specification
Digital servo processor and Compact Disc
decoder with integrated DAC (CD10)
SAA7325
7.8
DAC interface
7.8.1
I
NTERNAL BITSTREAM DIGITAL
-
TO
-
ANALOG CONVERTER
(DAC)
The onboard bitstream DAC operates at a clock frequency of 96f
s
and is designed for operation with an audio input at
1f
s
. Optimum performance is dependent on the application circuit used and careful consideration should be given to the
recommended application circuits shown in Figs. 38 and 39. The onboard DAC is controlled from shadow register 7
(see Section 7.15.3 for definition of shadow registers). This shadow register controls routing of data into the onboard
DAC and also controls the DAC output pins, which can be held at zero when the onboard DAC is not required;
see Table 4.
Table 4
Shadow register
Audio data from the decoder part of SAA7325 can be routed as described in the following two subsections:
SHADEN
SHADOW
ADDRESS
REGISTER
DATA
FUNCTION
RESET
1
0111 (7H)
control of
onboard DAC
XXX0
XXX1
XX0X
hold onboard DAC outputs at zero
enable onboard DAC outputs
use external DAC or route audio data into
onboard DAC (loopback mode)
route audio data into onboard DAC
(non-loopback mode)
reset
reset
XX1X
7.8.1.1
Use onboard DAC
In this mode, shadow register 7 should be set to XX11.
This routes audio data from the decoder part of CD10 into
the onboard DAC and enables the DAC output pins
(LN, LP, RN and RP). It should be noted that the DAC
interface format (set by decoder register 3) must be set to
16-bit 1f
s
mode, either I
2
S-bus or EIAJ format, for optimum
DAC performance to be achieved. CD-ROM mode can
also be used if interpolation is not required.
When using this mode, the serial data output pins for
interfacing with an external DAC (SCLK, WCLK, DATA
and EF) are set to high-impedance.
7.8.1.2
Loopback external data into onboard DAC
The onboard DAC can also be set to accept serial data
inputs from an external source, e.g. an Electronic Shock
Absorption (ESA) IC. This is known as loopback mode and
is enabled by setting shadow register 7 to XX01. This
enables the serial data output pins (SCLK, WCLK, DATA
and EF) so that data can be routed from the SAA7325 to
an external ESA system (or external DAC).
The serial data from an external ESA IC can then also be
input to the onboard DAC on the SAA7325 by utilising the
serial data input interface (SCLI, SDI and WCLI).
In this mode, a wide range of data formats to the external
ESA IC can be programmed as shown in Table 5.
However, the serial input on the SAA7325 will always
expect the input data from the ESA IC to be 16 bit 1f
s
and
the same data format, either I
2
S-bus or EIAJ, as the serial
output format (set by decoder register 3).
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