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參數(shù)資料
| 型號(hào)： | SAA2013 |
| 廠商： | NXP Semiconductors N.V. |
| 英文描述： | Adaptive allocation and scaling for PASC coding in DCC systems |
| 中文描述： | 自適應(yīng)分配和戴納信貸混凝劑縮放系統(tǒng)編碼 |
| 文件頁(yè)數(shù)： | 10/32頁(yè) |
| 文件大?。?/td> | 137K |
| 代理商： | SAA2013 |
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May 1994
10
Philips Semiconductors
Preliminary specification
Adaptive allocation and scaling for PASC
coding in DCC systems
SAA2013
Fig.7 Filtered interface format.
handbook, full pagewidth
left
right
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R
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R
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1
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32 bits
td3
cL
t
cH
t
td4
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tsu1
th1
FDCL
FDAO
FDAI
FDWS
FSYNC
sub-band
FDWS
FDCL
FDWS
FSYNC
timing
MGB360
1 bit
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7 bit
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Control interfaces
Two 3-wire control interfaces are provided (referred to as
‘L3’ interfaces). One is connected to the system
microcontroller (L3MODEM, L3CLKM, L3DATAM where
‘M’ represents microcontroller), the other to SAA2003
(L3MODEC, L3CLKC, L3DATAC where ‘C’ represents
codec). In general, control data is passed between
SAA2003 and the microcontroller via SAA2013. This
ensures that the microcontroller is buffered from the
time-critical SAA2013 to SAA2003 interface during
encode.
The SAA2013 does not interpret the data from the
microcontroller interface.
Status information from the codec is interpreted to ensure
that SAA2013 quickly acts upon the status of SAA2003.
The L3 bus operation is shown in Fig.8. There are three
modes:
1.
Address.
2.
Data.
3.
Halt.
Each interface operates as either a master or a slave,
where the master provides L3CLK and L3MODE. For the
microcontroller to SAA2013 interface, the microcontroller
is the master. For the SAA2013 to SAA2003 interface,
SAA2013 is the master.
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