![](http://datasheet.mmic.net.cn/Freescale-Semiconductor/S9S12HA32J0CLL_datasheet_99631/S9S12HA32J0CLL_85.png)
Port Integration Module (S12HYPIMV1)
MC9S12HY/HA-Family Reference Manual, Rev. 1.05
Freescale Semiconductor
85
Table 2-19. PTS Register Field Descriptions
Field
Description
7
PTS
Port S general purpose input/output data—Data Register, SPI SS inout, IIC SDA inout, PWM channel3
When not used with the alternative function, the associated pin can be used as general purpose I/O. In general
purpose output mode the register bit value is driven to the pin.
If the associated data direction bit is set to 1, a read returns the value of the port register bit, otherwise the buffered
pin input state is read.
The SPI takes precedence over the IIC, PWM3 and the general purpose I/O function if enabled
The IIC takes precedence over the PWM3 and the general purpose I/O function if enabled
The PWM3 takes precedence over the general purpose I/O function if enabled
6
PTS
Port S general purpose input/output data—Data Register, SPI SCK inout, PWM channel2
When not used with the alternative function, the associated pin can be used as general purpose I/O. In general
purpose output mode the register bit value is driven to the pin.
If the associated data direction bit is set to 1, a read returns the value of the port register bit, otherwise the buffered
pin input state is read.
The SPI takes precedence over the PWM2 and the general purpose I/O function if enabled
The PWM2 takes precedence over the general purpose I/O function if enabled
5
PTS
Port S general purpose input/output data—Data Register, SPI MOSI inout, PWM channel1
When not used with the alternative function, the associated pin can be used as general purpose I/O. In general
purpose output mode the register bit value is driven to the pin.
If the associated data direction bit is set to 1, a read returns the value of the port register bit, otherwise the buffered
pin input state is read.
The SPI takes precedence over the PWM1 and the general purpose I/O function if enabled
The PWM1 takes precedence over the general purpose I/O function if enabled
4
PTS
Port S general purpose input/output data—Data Register, SPI MISO inout, IIC SCL inout, PWM channel0
When not used with the alternative function, the associated pin can be used as general purpose I/O. In general
purpose output mode the register bit value is driven to the pin.
If the associated data direction bit is set to 1, a read returns the value of the port register bit, otherwise the buffered
pin input state is read.
The SPI takes precedence over the IIC, PWM0 and the general purpose I/O function if enabled
The IIC takes precedence over the PWM0 and the general purpose I/O function if enabled
The PWM0 takes precedence over the general purpose I/O function if enabled
3
PTS
Port S general purpose input/output data—Data Register, CAN TX
When not used with the alternative function, the associated pin can be used as general purpose I/O. In general
purpose output mode the register bit value is driven to the pin.
If the associated data direction bit is set to 1, a read returns the value of the port register bit, otherwise the buffered
pin input state is read.
The CAN takes precedence over the general purpose I/O function if enabled
2
PTS
Port S general purpose input/output data—Data Register, CAN RX
When not used with the alternative function, the associated pin can be used as general purpose I/O. In general
purpose output mode the register bit value is driven to the pin.
If the associated data direction bit is set to 1, a read returns the value of the port register bit, otherwise the buffered
pin input state is read.
The CAN takes precedence over the general purpose I/O function if enabled