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參數(shù)資料
| 型號： | S6C0672 |
| 廠商： | SAMSUNG SEMICONDUCTOR CO. LTD. |
| 英文描述： | 6 BIT 384 CHANNEL TFT-LCD SOURCE DRIVER |
| 中文描述： | 6通道384位的TFT - LCD源驅(qū)動 |
| 文件頁數(shù)： | 16/19頁 |
| 文件大?。?/td> | 206K |
| 代理商： | S6C0672 |
S6C0672
6 BIT 384 CHANNEL TFT-LCD SOURCE DRIVER
16
DC CHARACTERISTICS
Table 5. DC Characteristics (Ta = -20 to 75
°
C, VDD1 = 2.7 to 3.6 V, VDD2 = 7 to 13 V, VSS1 = VSS2 = 0 V)
Parameter
Symbol
VIH
VIL
IL
Condition
Min.
0.7 VDD1
0
-1
Typ.
-
-
-
Max.
VDD1
0.3 VDD1
1
Unit
High level input voltage
Low level input voltage
Input leakage current
V
SHL, CLK2, D00 - D55,
CLK1, POL, DATPOL,
DIO1 (DIO2)
μ
A
High level output voltage
VOH
DIO1 (DIO2),
IO = -1.0 mA
DIO1 (DIO2),
IO = +1.0 mA
Refer to Table 1. Resistor
Strings
VDD2 = 9.0 V,
Vx = 2.5 V, Vyo = 8.5 V
VDD2 = 9.0 V,
Vx = 6.5 V, Vyo = 0.5 V
VSS2 + 0.2 V to
VDD2 - 1.5 V
VDD2 - 1.5 V to
VDD2 - 0.2 V
VDD1 - 0.5
-
-
Low level output voltage
VOL
-
-
0.5
V
Resistor
R0 - R62
Rn
×
0.7
Rn
×
1.3
IVOH
-
-0.5
-0.3
mA
Driver output current
IVOL
0.3
0.5
-
mA
-
±
10
±
20
Output voltage deviation
VO
-
±
15
±
25
Output RMS voltage
deviation
dVrms
(2)
Input data: 00H to 3FH
-
±
5
±
15
mV
Output voltage range
Logic part dynamic
current
Vyo
Input data: 00H to 3FH
VSS2 + 0.2
-
VDD2 - 0.2
V
IDD1
VDD1 = 3.0 V
(3)
-
4.0
5.5
Driver part dynamic
current
IDD2
VDD1 = 3.0 V,
VDD2 = 9.0 V,
VGMA1 = 8.5 V,
VGMA5 = 5.0 V,
VGMA6 = 4.0 V,
VGMA10 = 0.5 V
(3) (4)(5)
-
4.0
7.0
mA
NOTES:
1. Vyo is the output voltage of analog output pins Y1 to Y384. Vx is the voltage applied to analog output pins Y1 to Y384.
2. dVrms is a maximum deviation value from ideal difference between high output and low output at the same gray scale.
3. CLK1 period is defined to be 20
μ
s at fCLK2 = 33 MHz, data pattern = 101010 , (checkerboard pattern), Ta = 25
°
C
4. The current consumption per driver when XGA single-sided mounting (8 drivers) is connected in cascade
5. No load
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