參數(shù)資料
型號: S3C1860XX-DK
元件分類: 微控制器/微處理器
英文描述: 4-BIT, MROM, 6 MHz, MICROCONTROLLER, PDIP20
封裝: 0.300 INCH, DIP-20
文件頁數(shù): 27/95頁
文件大小: 339K
代理商: S3C1860XX-DK
S3C1840/C1850/C1860/P1860
INSTRUCTION SET
5-5
MOV
A,@HL
Binary Code:
0 0 1 0
0 0 0 1
Description:
The contents of the data memory addressed by registers H and L are moved to
accumulator.
The contents of the source operand are not affected.
Operation:
(A)
← M [(H,L)]
Flags:
SF : Set to one
SL : Unaffected
Example:
Assume HL contains 04H
MOV
A,@HL
; Move contents of RAM addressed 04H to A
MOV L,@HL
Binary Code:
0 0 1 0
Description:
The contents of the data memory addressed by registers H and L are moved to register L.
The contents of the source operand are not affected.
Operation:
(L)
← M [(H,L)]
Flags:
SF : Set to one
SL : Unaffected
Example:
Assume Hl contains 04H
MOV
L,@HL
; Move contents of RAM address 4H to REG L
CPNE
L,#5H
; Compare 5H to REG L values
JP
XX
; jump to XX if REG L value is not 5H
JP
YY
; Jump to YY if REG L value is 5H
MOV @HL+,A
Binary Code:
0 0 1 0
0 1 0 1
Description:
The contents of the accumulator are moved to the data memory addressed by registers
H,L;
L register contents are incremented by one.
The contents of the source operand are not affected.
Operation:
M [(H,L)]
← (A), L ← L + 1
Flags:
SF : Set if carry occurs; cleared otherwise
SL : Unaffected
Example:
MOV
H,#0H
MOV
L,#0FH
CLR
A
MOV
@HL+A
; Move 0H to RAM address 0FH and increment REG L value
by one
JP
PRT
; jump to PRT, since there is a carry from increment
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