參數(shù)資料
型號(hào)： S29NS128P
廠商： Spansion Inc.
英文描述： MirrorBit Flash Family
中文描述： MirrorBit閃存系列
文件頁數(shù)： 49/86頁
文件大小： 2234K
代理商： S29NS128P
February 20, 2007 S29NS-P_00_A1
S29NS-P MirrorBit
TM
Flash Family
49
D a t a
S h e e t
( A d v a n c e
I n f o r m a t i o n )
other memory banks, then it is recommended to use the DQ7 status bit as the alternative method of
determining the active or inactive status of the write operation.
DQ5: Exceeded Timing Limits
DQ5 indicates whether the program or erase time has exceeded a specified internal pulse count limit. Under
these conditions DQ5 produces a
1
, indicating that the program or erase cycle was not successfully
completed. The device may output a
1
on DQ5 if the system tries to program a
1
to a location that was
previously programmed to
0
. Only an erase operation can change a
0
back to a
1
. Under this condition, the
device halts the operation, and when the timing limit has been exceeded, DQ5 produces a
1
. Under both
these conditions, the system must write the reset command to return to the read mode (or to the erase-
suspend-read mode if a bank was previously in the erase-suspend-program mode).
DQ3: Sector Erase Timeout State Indicator
After writing a sector erase command sequence, the system may read DQ3 to determine whether or not
erasure has begun. (The sector erase timer does not apply to the chip erase command.) If additional sectors
are selected for erasure, the entire time-out also applies after each additional sector erase command. When
the time-out period is complete, DQ3 switches from a
0
to a
1
. If the time between additional sector erase
commands from the system can be assumed to be less than t
SEA
, the system need not monitor DQ3. See the
Sector Erase Command Sequence, for more details.
After the sector erase command is written, the system should read the status of DQ7 (Data# Polling) or DQ6
(Toggle Bit I) to ensure that the device has accepted the command sequence, and then read DQ3. If DQ3 is
1
, the Embedded Erase algorithm has begun; all further commands (except Erase Suspend) are ignored until
the erase operation is complete. If DQ3 is
0
, the device accepts additional sector erase commands. To
ensure the command has been accepted, the system software should check the status of DQ3 prior to and
following each sub-sequent sector erase command. If DQ3 is high on the second status check, the last
command might not have been accepted.
Table 6.27
shows the status of DQ3 relative to the other status bits.
DQ1: Write to Buffer Abort
DQ1 indicates whether a Write to Buffer operation was aborted. Under these conditions DQ1 produces a
1
.
The system must issue the Write to Buffer Abort Reset command sequence to return the device to reading
array data. See Write Buffer Programming Operation for more details.
Notes
1. DQ5 switches to
1
when an Embedded Program or Embedded Erase operation has exceeded the maximum timing limits. Refer to the
section on DQ5 for more information.
2. DQ7 and DQ2 require a valid address when reading status information. Refer to the appropriate subsection for further details.
3. Data are invalid for addresses in a Program Suspended sector.
4. DQ1 indicates the Write to Buffer ABORT status during Write Buffer Programming operations.
5. The data-bar polling algorithm should be used for Write Buffer Programming operations. Note that DQ7# during Write Buffer
Programming indicates the data-bar for DQ7 data
for the LAST LOADED WRITE-BUFFER ADDRESS location
.
Table 6.27
Write Operation Status
Status
DQ7
(2)
DQ6
DQ5
(1)
DQ3
DQ2
(2)
DQ1
(4)
Standard
Mode
Embedded Program
Algorithm
DQ7#
Toggle
0
N/A
No toggle
0
Embedded Erase
Algorithm
0
Toggle
0
1
Toggle
N/A
Program
Suspend
Mode
(3)
Reading within Program
Suspended Sector
INVALID
(Not
Allowed)
INVALID
(Not
Allowed)
INVALID
(Not
Allowed)
INVALID
(Not
Allowed)
INVALID
(Not
Allowed)
INVALID
(Not
Allowed)
Reading within Non-Program
Suspended Sector
Data
Data
Data
Data
Data
Data
Erase
Suspend
Mode
Erase-Suspend-
Read
Erase
Suspended
Sector
1
No toggle
0
N/A
Toggle
N/A
Non-Erase
Suspended
Sector
Data
Data
Data
Data
Data
Data
Erase-Suspend-Program
DQ7#
Toggle
0
N/A
N/A
N/A
Write to
Buffer
(5)
BUSY State
DQ7#
Toggle
0
N/A
N/A
0
Exceeded Timing Limits
DQ7#
Toggle
1
N/A
N/A
0
ABORT State
DQ7#
Toggle
0
N/A
N/A
1
相關(guān)PDF資料
PDF描述
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S29NS128P0SBJW000 MirrorBit Flash Family
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
S29NS128P0PBJW000 功能描述:閃存 128M (8MX16) 66MHz Simultaneous R/W RoHS:否 制造商:ON Semiconductor 數(shù)據(jù)總線寬度:1 bit 存儲(chǔ)類型:Flash 存儲(chǔ)容量:2 MB 結(jié)構(gòu):256 K x 8 定時(shí)類型: 接口類型:SPI 訪問時(shí)間: 電源電壓-最大:3.6 V 電源電壓-最小:2.3 V 最大工作電流:15 mA 工作溫度:- 40 C to + 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體: 封裝:Reel
S29NS128P0PBJW003 制造商:SPANSION 制造商全稱:SPANSION 功能描述:MirrorBit Flash Family
S29NS128P0SBJW000 制造商:SPANSION 制造商全稱:SPANSION 功能描述:MirrorBit Flash Family
S29NS128P0SBJW003 制造商:SPANSION 制造商全稱:SPANSION 功能描述:MirrorBit Flash Family
S29NS128PABBJW000 制造商:SPANSION 制造商全稱:SPANSION 功能描述:MirrorBit Flash Family
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