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參數(shù)資料
| 型號： | S29NS128P0SBJW003 |
| 廠商： | SPANSION LLC |
| 元件分類： | DRAM |
| 英文描述： | MirrorBit Flash Family |
| 中文描述： | 8M X 16 FLASH 1.8V PROM, 80 ns, PBGA64 |
| 封裝： | 6.20 X 7.70 MM , LEAD FREE, TFBGA-64 |
| 文件頁數(shù)： | 39/86頁 |
| 文件大?。?/td> | 2234K |
| 代理商： | S29NS128P0SBJW003 |
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February 20, 2007 S29NS-P_00_A1
S29NS-P MirrorBit
TM
Flash Family
39
D a t a
S h e e t
( A d v a n c e
I n f o r m a t i o n )
Figure 6.3
Write Buffer Programming Operation
6.5.3
Sector Erase
The sector erase function erases one or more sectors in the memory array. (See
Table 11.1
and
Figure 6.4
.)
The device does not require the system to preprogram prior to erase. The Embedded Erase algorithm
automatically programs and verifies the entire memory for an all zero data pattern prior to electrical erase.
After a successful sector erase, all locations within the erased sector contain FFFFh. The system is not
required to provide any controls or timings during these operations.
After the command sequence is written, a sector erase time-out of no less than t
SEA
occurs. During the time-
out period, additional sector addresses and sector erase commands may be written. Loading the sector erase
buffer may be done in any sequence, and the number of sectors may be from one sector to all sectors. The
time between these additional cycles must be less than t
SEA
. Any sector erase address and command
following the exceeded time-out (t
SEA
) may or may not be accepted. Any command other than Sector Erase
or Erase Suspend during the time-out period resets that bank to the read mode. The system can monitor DQ3
Write Unlock Cycles:
Address 555h, Data AAh
Address 2AAh, Data 55h
Issue
Write Buffer Load Command:
Program Address Data 25h
Load Word Count to Program
Program Data to Address:
SA = wc
Unlock Cycle 1
Unlock Cycle 2
wc = number of words – 1
Yes
Yes
Yes
Yes
No
No
No
No
wc = 0
Write Buffer
Abort
Polling Status
= Done
Error
FAIL. Issue reset command
to return to read array mode.
PASS. Device is in
read mode.
Confirm command:
SA 29h
Perform Polling Algorithm
(see Write Operation Status
flowchart)
Write Next Word,
Decrement wc:
PA data , wc = wc
– 1
RESET. Issue Write Buffer
Abort Reset Command
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| S29NS128PABBJW000 | MirrorBit Flash Family |
| S29NS128PABBJW003 | MirrorBit Flash Family |
| S29NS256P | MirrorBit Flash Family |
| S29NS256P0PBJW000 | MirrorBit Flash Family |
| S29NS256P0PBJW003 | MirrorBit Flash Family |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| S29NS128PABBJW000 | 制造商:SPANSION 制造商全稱:SPANSION 功能描述:MirrorBit Flash Family |
| S29NS128PABBJW003 | 制造商:SPANSION 制造商全稱:SPANSION 功能描述:MirrorBit Flash Family |
| S29NS256N | 制造商:SPANSION 制造商全稱:SPANSION 功能描述:256/128/64 Megabit (16/8/4M x 16-bit), CMOS 1.8 Volt-only Simultaneous Read/Write, Multiplexed, Burst Mode Flash Memory |
| S29NS256N0PBJW000 | 制造商:SPANSION 制造商全稱:SPANSION 功能描述:Simultaneous Read/Write, Multiplexed, Burst Mode Flash Memory |
| S29NS256N0PBJW002 | 制造商:SPANSION 制造商全稱:SPANSION 功能描述:Simultaneous Read/Write, Multiplexed, Burst Mode Flash Memory |
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