參數(shù)資料
型號: S29JL032J70TFI213
廠商: SPANSION LLC
元件分類: PROM
英文描述: 2M X 16 FLASH 3V PROM, 70 ns, PDSO48
封裝: LEAD FREE, MO-142(D)DD, TSOP-48
文件頁數(shù): 6/63頁
文件大?。?/td> 1618K
代理商: S29JL032J70TFI213
14
S29JL032J
S29JL032J_00_05 August 24, 2011
Data
She e t
8.
Device Bus Operations
This section describes the requirements and use of the device bus operations, which are initiated through the
internal command register. The command register itself does not occupy any addressable memory location.
The register is a latch used to store the commands, along with the address and data information needed to
execute the command. The contents of the register serve as inputs to the internal state machine. The state
machine outputs dictate the function of the device. Table 8.1 lists the device bus operations, the inputs and
control levels they require, and the resulting output. The following subsections describe each of these
operations in further detail.
Legend
L = Logic Low = VIL
H = Logic High = VIH
VID = 8.5–12.5V
VHH = 9.0 ± 0.5V
X = Don’t Care
SA = Sector Address
AIN = Address In
DIN = Data In
DOUT = Data Out
Notes:
1. Addresses are A20:A0 in word mode (BYTE# = VIH), A20:A-1 in byte mode (BYTE# = VIL).
2. The sector protect and sector unprotect functions may also be implemented via programming equipment. See Boot Sector/Sector Block
3. If WP#/ACC = VIL, the two outermost boot sectors remain protected. If WP#/ACC = VIH, protection on the two outermost boot sectors
depends on whether they were last protected or unprotected using the method described in Boot Sector/Sector Block Protection and
Unprotection on page 23. If WP#/ACC = VHH, all sectors will be unprotected.
8.1
Word/Byte Configuration
The BYTE# pin controls whether the device data I/O pins operate in the byte or word configuration. If the
BYTE# pin is set at logic ‘1’, the device is in word configuration, DQ15–DQ0 are active and controlled by CE#
and OE#.
If the BYTE# pin is set at logic ‘0’, the device is in byte configuration, and only data I/O pins DQ7–DQ0 are
active and controlled by CE# and OE#. The data I/O pins DQ14–DQ8 are tri-stated, and the DQ15 pin is used
as an input for the LSB (A-1) address function. Please note that the BYTE# pin must be connected to either
the system VCC or ground.
Table 8.1 S29JL032J Device Bus Operations
Operation
CE#
OE#
WE#
RESET#
WP#/ACC
Addresses
DQ15–DQ8
DQ7–DQ0
BYTE# = VIH
BYTE# = VIL
Read
L
H
L/H
AIN
DOUT
DQ14–DQ8 = High-Z,
DQ15 = A-1
DOUT
Write
L
H
L
H
AIN
DIN
Standby
VCC ±
0.3V
XX
VCC ±
0.3V
L/H
X
High-Z
Output Disable
L
H
L/H
X
High-Z
Reset
X
L
L/H
X
High-Z
Sector Protect
LH
L
VID
L/H
SA, A6 = L,
A1 = H, A0 = L
XX
DIN
Sector Unprotect
LH
L
VID
SA, A6 = H,
A1 = H, A0 = L
XX
DIN
Temporary Sector
Unprotect
XX
X
VID
AIN
DIN
High-Z
DIN
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