參數(shù)資料
型號: S29GL256M10TAIR10
廠商: SPANSION LLC
元件分類: DRAM
英文描述: 3.0 Volt-only Page Mode Flash Memory featuring 0.23 um MirrorBit process technology
中文描述: 16M X 16 FLASH 3V PROM, 100 ns, PDSO56
封裝: MO-142EC, TSOP-56
文件頁數(shù): 116/160頁
文件大?。?/td> 2142K
代理商: S29GL256M10TAIR10
116
S29GLxxxM MirrorBit
TM
Flash Family
S29GLxxxM_00A5 April 30, 2004
P r e l i m i n a r y
Figure 7. Data# Polling Algorithm
RY/BY#: Ready/Busy#
The RY/BY# is a dedicated, open-drain output pin which indicates whether an
Embedded Algorithm is in progress or complete. The RY/BY# status is valid after
the rising edge of the final WE# pulse in the command sequence. Since RY/BY#
is an open-drain output, several RY/BY# pins can be tied together in parallel with
a pull-up resistor to V
CC
.
If the output is low (Busy), the device is actively erasing or programming. (This
includes programming in the Erase Suspend mode.) If the output is high (Ready),
the device is in the read mode, the standby mode, or in the erase-suspend-read
mode. Table
33
shows the outputs for RY/BY#.
DQ7 = Data
Yes
No
No
DQ5 = 1
No
Yes
Yes
FAIL
PASS
Read DQ15–DQ0
Addr = VA
Read DQ15–DQ0
Addr = VA
DQ7 = Data
START
Notes:
1. VA = Valid address for programming. During a sector
erase operation, a valid address is any sector address
within the sector being erased. During chip erase, a
valid address is any non-protected sector address.
2. DQ7 should be rechecked even if DQ5 = “1” because
DQ7 may change simultaneously with DQ5.
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