參數資料
型號: S29GL128P10TAIV10
廠商: SPANSION LLC
元件分類: DRAM
英文描述: 3.0 Volt-only Page Mode Flash Memory featuring 90 nm MirrorBit Process Technology
中文描述: 128M X 1 FLASH 3V PROM, 100 ns, PDSO56
封裝: 20 X 14 MM, MO-142EC, TSOP-56
文件頁數: 76/77頁
文件大?。?/td> 2121K
代理商: S29GL128P10TAIV10
76
S29GL-P MirrorBit
Flash Family
S29GL-P_00_A7 November 8, 2007
D a t a
S h e e t
( P r e l i m i n a r y )
14. Revision History
Section
Description
Revision A0 (October 29, 2004)
Initial Release.
Revision A1 (October 20, 2005)
Global
Revised all sections of document.
Revision A2 (October 19, 2006)
Global
Revised all sections of document. Reformatted document to new template. Changed speed options
for S29GL01GP.
Revision A3 (November 21, 2006)
AC Characteristics
Erase and Program Operations table:
Changed t
BUSY
to a maximum specification.
Revision A4 (December 18, 2006)
Global
Changed t
ACC
, t
CE
specifications on 128 Mb, 256 Mb, and 512 Mb devices. Added 90 and 100 ns
speed options.
Write Buffer Programming, Sector
Erase
Write Buffer Programming Operation, Sector Erase Operation figures:
Deleted “Wait 4 ms” box from
flowcharts.
Password Protection Method
Lock Register Program Algorithm figure:
Deleted “Wait 4 ms” box from flowchart.
Read-only Operations table
Modified t
RC
, t
ACC
, t
CE
, t
OE
specifications.
Changed t
DS
specification, deleted write cycle time note.
Changed all specifications in table.
Program and Erase Operations tables
TSOP Pin and BGA Capacitance table
Revision A5 (May 18, 2007)
Global
Changed data sheet status to Preliminary.
Deleted references to requirement for external WP# pullup.
Performance Characteristics
Max. Read Access Times table:
Added note.
Hardware Reset
Deleted note from section.
AC Characteristics
Reset Timings figure:
Deleted note.
Command Definitions tables
S29GL-P Sector Protection Command Definitions tables:
Changed “Global Non-Volatile Freeze” to
“Global Volatile Freeze”.
DC Characteristics
CMOS Compatible table:
Changed I
CC1
maximum current for 5 MHz and MHz test conditions.
Corrected address range for top waveform.
Page Read Timings figure
Revision A6 (October 23, 2007)
Performance Characteristics
Changed speed options for S29GL512P
Ordering Information
Corrected samples OPN valid combinations; changed speed options for S29GL512P
64-Ball Fortified BGA
Clarified ball “D1” connection
56-Pin TSOP
Clarified pin “30” connection
Autoselect
Added recommendation statement
Accelerated Program
Added recommendation statement
Persistent Protection Bits
Removed “Erase” from title and flow chart
Secured Silicon Sector
Sections “Factory Locked Secured Silicon Sector” & “Customer Lockable Secured Silicon Sector”:
clarified shipping options
Power-up Sequence Timing
Changed t
RH
from “Max” to “Min” value
Advance Information on S29GL-R
65 nm MirrorBit Hardware Reset
(RESET#) and Power-up Sequence
Added section
Global
Fixed cross-references that were not live hyperlinks.
Revision A7 (November 8, 2007)
Advance Information on S29GL-R 65
nm MirrorBit Hardware Reset (RESET#)
and Power-up Sequence
Changed timing specs and waveforms
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