參數資料
型號: S29GL032M10FAIR63
廠商: Spansion Inc.
英文描述: MirrorBit Flash Family
中文描述: MirrorBit閃存系列
文件頁數: 34/159頁
文件大?。?/td> 5216K
代理商: S29GL032M10FAIR63
Octorber 18, 2004 S29GLxxxM_00_B3
S29GLxxxM MirrorBitTM Flash Family
129
Da tash eet
Erase and Program Operations-S29GL128M Only
Notes:
1. Not 100% tested.
3. For 1–16 words/1–32 bytes programmed.
4. If a program suspend command is issued within tPOLL, the device requires tPOLL before reading status data, once programming resumes (that
is, the program resume command has been written). If the suspend command was issued after tPOLL, status data is available immediately
after programming resumes. See Figure 16, on page 132.
Parameter
Speed Options
Unit
JEDEC
Std.
Description
90
10
tAVAV
tWC
Write Cycle Time (Note 1)
Min
90
100
ns
tAVWL
tAS
Address Setup Time
Min
0
ns
tASO
Address Setup Time to OE# low during toggle bit polling
Min
15
ns
tWLAX
tAH
Address Hold Time
Min
45
ns
tAHT
Address Hold Time From CE# or OE# high during toggle bit
polling
Min
0
ns
tDVWH
tDS
Data Setup Time
Min
45
ns
tWHDX
tDH
Data Hold Time
Min
0
ns
tCEPH
CE# High during toggle bit polling
Min
20
ns
tOEPH
OE# High during toggle bit polling
Min
20
ns
tGHWL
Read Recovery Time Before Write (OE# High to WE# Low)
Min
0
ns
tELWL
tCS
CE# Setup Time
Min
0
ns
tWHEH
tCH
CE# Hold Time
Min
0
ns
tWLWH
tWP
Write Pulse Width
Min
35
ns
tWHDL
tWPH
Write Pulse Width High
Min
30
ns
tWHWH1
Write Buffer Program Operation (Notes 2, 3)
Typ
240
s
Single Word Program Operation (Note 2)
Typ
60
Accelerated Single Word Program Operation (Note 2)
Typ
54
tWHWH2
Sector Erase Operation (Note 2)
Typ
0.5
sec
tVHH
VHH Rise and Fall Time (Note 1)
Min
250
ns
tVCS
VCC Setup Time (Note 1)
Min
50
s
tBUSY
WE# High to RY/BY# Low
Min
90
100
ns
tPOLL
Program Valid before Status Polling
Max
4
s
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