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參數(shù)資料
| 型號(hào)： | S29GL032M10BAIR63 |
| 廠商： | SPANSION LLC |
| 元件分類： | DRAM |
| 英文描述： | MirrorBit Flash Family |
| 中文描述： | 2M X 16 FLASH 3V PROM, 100 ns, PBGA48 |
| 封裝： | 8 X 6 MM, BGA-48 |
| 文件頁(yè)數(shù)： | 109/159頁(yè) |
| 文件大?。?/td> | 2217K |
| 代理商： | S29GL032M10BAIR63 |
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Octorber 18, 2004 S29GLxxxM_00_B3
S29GLxxxM MirrorBit
TM
Flash Family
109
D a t a s h e e t
The system must write the Program Resume command (address bits are don’t care) to exit the Program Suspend
mode and continue the programming operation. Further writes of the Resume command are ignored. Another Pro-
gram Suspend command can be written after the device resumes programming.
Figure 5. Program Suspend/Program Resume
Chip Erase Command Sequence
Chip erase is a six bus cycle operation. The chip erase command sequence is initiated by writing two unlock cycles,
followed by a set-up command. Two additional unlock write cycles are then followed by the chip erase command,
which in turn invokes the Embedded Erase algorithm. The device does
not
require the system to preprogram prior
to erase. The Embedded Erase algorithm automatically preprograms and verifies the entire memory for an all zero
data pattern prior to electrical erase. The system is not required to provide any controls or timings during these
operations.
Table 35 on page 113
and
Table 36 on page 114
show the address and data requirements for the chip
erase command sequence.
When the Embedded Erase algorithm is complete, the device returns to the read mode and addresses are no
longer latched. The system can determine the status of the erase operation by using DQ7, DQ6, or DQ2. Refer to
the
“Write Operation Status” on page 115
section for information on these status bits.
Any commands written during the chip erase operation are ignored. However, note that a
hardware reset
im-
mediately terminates the erase operation. If that occurs, the chip erase command sequence should be reinitiated
once the device returns to reading array data, to ensure data integrity.
Figure 6, on page 111
illustrates the algorithm for the erase operation. Refer to the
“Erase and Programming Per-
formance” on page 141
in the
“AC Characteristics” on page 124
section for parameters, and
Figure 18, on
page 133
for timing diagrams.
Program Operation
or Write-to-Buffer
Sequence in Progress
Write Program Suspend
Command Sequence
Command is also valid for
Erase-suspended-program
operations
Autoselect and SecSi Sector
read operations are also allowed
Data cannot be read from erase- or
program-suspended sectors
Write Program Resume
Command Sequence
Read data as
required
Done
reading
No
Yes
Write address/data
XXXh/30h
Device reverts to
operation prior to
Program Suspend
Write address/data
XXXh/B0h
Wait 15
μ
s
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| S29GL032M10BFIR50 | MirrorBit Flash Family |
| S29GL032M10FBCR50 | MirrorBit Flash Family |
| S29GL064N11FFIV20 | 64 Megabit, 32 Megabit 3.0-Volt only Page Mode Flash Memory Featuring 110 nm MirrorBit Process Technology |
| S29GL064N11BFIV22 | 64 Megabit, 32 Megabit 3.0-Volt only Page Mode Flash Memory Featuring 110 nm MirrorBit Process Technology |
| S29GL064N11BFIV60 | 64 Megabit, 32 Megabit 3.0-Volt only Page Mode Flash Memory Featuring 110 nm MirrorBit Process Technology |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| S29GL032M10BBCR00 | 制造商:SPANSION 制造商全稱:SPANSION 功能描述:MirrorBit Flash Family |
| S29GL032M10BBCR02 | 制造商:SPANSION 制造商全稱:SPANSION 功能描述:MirrorBit Flash Family |
| S29GL032M10BBCR03 | 制造商:SPANSION 制造商全稱:SPANSION 功能描述:MirrorBit Flash Family |
| S29GL032M10BBCR10 | 制造商:SPANSION 制造商全稱:SPANSION 功能描述:MirrorBit Flash Family |
| S29GL032M10BBCR12 | 制造商:SPANSION 制造商全稱:SPANSION 功能描述:MirrorBit Flash Family |
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