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參數(shù)資料
| 型號(hào)： | S1C60L02 |
| 元件分類： | 微控制器/微處理器 |
| 英文描述： | 4-BIT, MROM, 0.08 MHz, MICROCONTROLLER, PQFP60 |
| 文件頁(yè)數(shù)： | 67/102頁(yè) |
| 文件大?。?/td> | 674K |
| 代理商： | S1C60L02 |
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S1C60N02 TECHNICAL MANUAL
EPSON
59
CHAPTER 4: PERIPHERAL CIRCUITS AND OPERATION (Interrupt and HALT)
Interrupt and HALT
The S1C60N02 Series provides the following interrupt set-
tings, each of which is maskable.
External interrupt:
Input interrupt (one)
Internal interrupt:
Timer interrupt (one)
A/D converter interrupt (one)
To enable interrupts, the interrupt flag must be set to "1"
(EI) and the necessary related interrupt mask registers must
be set to "1" (enable). When an interrupt occurs, the inter-
rupt flag is automatically reset to "0" (DI) and interrupts
after that are inhibited.
When a HALT instruction is input, the CPU operating clock
stops and the CPU enters the halt state. The CPU is reacti-
vated from the halt state when an interrupt request occurs.
Figure 4.10.1 shows the configuration of the interrupt
circuit.
4.10
Fig. 4.10.1
Configuration of
interrupt circuit
K00
EIK00
K01
EIK01
K02
EIK02
K03
EIK03
IAD
EIAD
IT2
EIT2
IT8
EIT8
IT32
EIT32
IK0
(MSB)
:
(LSB)
Program counter of CPU
(three low-order bits)
Interrupt vector
Interrupt factor flag
Interrupt mask register
Interrupt
flag
INT
(Interrupt request)
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相關(guān)代理商/技術(shù)參數(shù) |
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| S1C60L05 | 制造商:EPSON 制造商全稱:EPSON 功能描述:4-bit Single Chip Microcomputer |
| S1C60L08 | 制造商:EPSON 制造商全稱:EPSON 功能描述:4-bit Single Chip Microcomputer |
| S1C60L16 | 制造商:EPSON 制造商全稱:EPSON 功能描述:4-bit Single Chip Microcomputer |
| S1C60N05 | 制造商:EPSON 制造商全稱:EPSON 功能描述:4-bit Single Chip Microcomputer |
| S1C60N08 | 制造商:EPSON 制造商全稱:EPSON 功能描述:4-bit Single Chip Microcomputer |
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