
1
OUTLINE
S1C33209/221/222 PRODUCT PART
EPSON
A-1
1 Outline
The S1C33209/221/222 is a Seiko Epson original 32-bit microcomputer. It features high speed, low power
consumption, and low-voltage operation, and is ideal for portable products that require high-speed data processing.
The S1C33209/221/222 consists of an S1C33000 32-bit RISC type CPU as its core, peripheral circuits including a bus
control unit, DMA controller, interrupt controller, timers, serial interface, and A/D converter, and also ROM and
RAM. A high-speed oscillation circuit and PLL, and a low-speed clock input circuit, are also included, supporting
advanced operation, power-saving operation, and high-speed realtime clock functions. Use of the internal MAC
(multiplication and accumulation) function in combination with the A/D converter also facilitates the design of
systems requiring DSP functions, such as speech recognition and synthesis applications.
Table 1.1 shows the various models. The package and data bus interface vary according to the model.
Table 1.1
Model Lineup
Model
Package
Internal RAM
Internal ROM
Data bus I/F
S1C33209F00A*
QFP5-128pin
8K bytes
None
TTL
S1C33209F01A*
QFP15-128pin
8K bytes
None
TTL
S1C33209F00E*
QFP5-128pin
8K bytes
None
CMOS/LVTTL
S1C33209F01E*
QFP15-128pin
8K bytes
None
CMOS/LVTTL
S1C33221*****
QFP5-128pin
8K bytes
128K bytes
TTL/CMOS/LVTTL
QFP15-128pin
8K bytes
128K bytes
TTL/CMOS/LVTTL
S1C33222*****
QFP5-128pin
8K bytes
64K bytes
TTL/CMOS/LVTTL
QFP15-128pin
8K bytes
64K bytes
TTL/CMOS/LVTTL
Notes: The S1C33221/222 subcode ("*****" in the above table) is defined individually by the user. The
package and data bus I/F are specified by the user.
The end of the S1C33209 subcode is not related to model identification.
The S1C33209F0xA0, in which the data bus interface is set to TTL level, should be used in systems with a 5 V
interface data bus.
Except where functions differ, the descriptions in this manual refer to model names S1C33209/221/222. Note that
functions described with reference to an individual model name apply only to that model.
1.1 Features
Core CPU
Seiko Epson original 32-bit RISC CPU S1C33000 built-in
Basic instruction set: 105 instructions (16-bit fixed size)
Sixteen 32-bit general-purpose register
32-bit ALU and 8-bit shifter
Multiplication/division instructions and MAC (multiplication and accumulation) instruction are available
16.7 ns of minimum instruction execution time at 60 MHz operation
Internal memory
ROM:
128K bytes (S1C33221)
64K bytes (S1C33222)
None (S1C33209)
RAM:
8K bytes
Internal peripheral circuits
Oscillation circuit:
High-speed (OSC3) oscillation circuit 33 MHz max.
Crystal/ceramic oscillator or external clock input
Low-speed (OSC1) oscillation circuit 32.768 kHz typ.
Crystal oscillator or external clock input
Timers:
8-bit timer
6 channels
16-bit timer
6 channels
Watchdog timer
(16-bit timer 0's function)
Clock timer
1 channel (with alarm function)