參數(shù)資料
型號(hào)： S-35399A03-J8T2U
元件分類： 時(shí)鐘/數(shù)據(jù)恢復(fù)及定時(shí)提取
英文描述： 1 TIMER(S), REAL TIME CLOCK, PDSO8
封裝： HALOGEN FREE AND LEAD FREE, SOP-8
文件頁(yè)數(shù)： 14/53頁(yè)
文件大?。?/td> 472K
代理商： S-35399A03-J8T2U
2-WIRE REAL-TIME CLOCK
Rev.2.0_00
S-35399A03
Seiko Instruments Inc.
21
Low Power Supply Voltage Detection Circuit
The S-35399A03 has a low power supply voltage detection circuit, so that users can monitor drops in the power supply
voltage by reading the BLD flag (B1 in the status register 1). There is a hysteresis width of approx. 0.15 V (Typ.) between
detection voltage and release voltage (refer to “
Characteristics (Typical Data)”
). The low power supply voltage
detection circuit does the sampling operation only once in one sec for 15.6 ms.
If the power supply voltage decreases to the level of detection voltage (VDET) or less, “1” is set to the BLD flag so that
sampling operation stops. Once “1” is detected in the BLD flag, no sampling operation is performed even if the power
supply voltage increases to the level of release voltage or more, and “1” is held in the BLD flag. After initialization, or once
the BLD flag is read, the BLD flag is automatically set to “0” to restart the sampling operation.
If the BLD flag is “1” even after the power supply voltage is recovered, the internal circuit may be in the indefinite status. In
this case, be sure to initialize the circuit.
VDD
BLD flag
Stop
Sampling pulse
Hysteresis width
0.15 V approximately
BLD flag
reading
Detection voltage
1 s
Release voltage
15.6 mm
Figure 22 Timing of Low Power Supply Voltage Detection Circuit
Circuits Power-on and Low Power Supply Voltage Detection
Figure 23
shows the changes of the POC flag and BLD flag due to VDD fluctuation.
VDD
BLD flag
Status register 1
reading
POC flag
VSS
Low power supply
voltage detection
voltage
Low power supply
voltage detection
voltage
Figure 23 POC Flag and BLD Flag
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