參數(shù)資料
型號: S-35180AT8T1
元件分類: 時鐘/數(shù)據(jù)恢復(fù)及定時提取
英文描述: REAL TIME CLOCK, PDSO8
封裝: TSSOP-8
文件頁數(shù): 5/46頁
文件大小: 498K
代理商: S-35180AT8T1
3-WIRE REAL-TIME CLOCK
Rev.2.0_00
S-35180A
Seiko Instruments Inc.
13
4. INT1 register_1 and INT1 register_2
INT1 register_1 and INT1 register_2 are interrupt setting registers that can be set independently. The
interrupt is output from the INT pin under the OR condition of the two registers. INT1 register_1 allows
setting the alarm time or frequency duty. INT1 register_2 allows setting the alarm time. The function is
switched by using status register_2.
(1)
Alarm interrupt
Data set in INT1 register_1 and INT1 register_2 is considered as alarm time data. Having the
same configuration as the hour and minute registers of the real-time data register, these
registers represent hours and minutes with BCD codes. When setting these registers, do not set
any nonexistent day. Data to be set must be in accordance with the 12-hour or 24-hour
expression that is set in status register_1.
H8
H4
H2
H1
MSB
LSB
A1mE
m8
m4
m2
m1
MSB
LSB
H20 H10
m10
m20
m40
H8
H4
H2
H1
MSB
LSB
A2mE
m8
m4
m2
m1
MSB
LSB
H20 H10
m10
m20
m40
AM/
PM
A1WE
0
W4
W2
W1
MSB
LSB
0
INT1 register_1
0
W4 W2
W1
MSB
LSB
0
INT1 register_2
A2WE
A1HE
A2HE AM/
PM
Figure 13 INT1 Register_1, INT1 Register_2 (Alarm Time Data)
In INT1 register_1, A1WE, A1HE, and A1mE are respectively in the MSB of each byte. By
setting each bit to “1”, the setting of the day of week data, hour data, and minute data in the
corresponding byte becomes valid. A2WE, A2HE, and A2mE of INT1 register_2 are the same.
(2)
Selected frequency steady interrupt
Data set in INT1 register_1 is considered as frequency duty data. By setting each bit from B4 to
B0 of the register to “1”, the frequency corresponding to each bit is selected in an ANDed form.
The SC bits configure a 3-bit SRAM type register that can be set freely by users. These bits can
be read and written within the operating voltage range (1.3 to 5.5 V). There is no impact on the
duty function.
B7
LSB
R/W
16 Hz
MSB
B6
B5
B4
B3
B2
B1
B0
4 Hz
8 Hz
SC
R/W
R/W: Read/write-enabled
R/W
2 Hz
1 Hz
SC
Figure 14 INT1 Register_1 (Frequency Duty Data)
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