參數(shù)資料
型號： S-35180AT8T1
元件分類： 時(shí)鐘/數(shù)據(jù)恢復(fù)及定時(shí)提取
英文描述： REAL TIME CLOCK, PDSO8
封裝： TSSOP-8
文件頁數(shù)： 23/46頁
文件大小： 498K
代理商： S-35180AT8T1
3-WIRE REAL-TIME CLOCK
Rev.2.0_00
S-35180A
Seiko Instruments Inc.
3
Description of Pins
Table 1
Pin No.
Symbol
Description
Configuration
1
INT
Interrrupt signal output pin
Depending on the mode set by INT1 register_1
and the status register, it outputs low or a clock
when the time is reached. It is disabled by
rewriting the status register.
Nch open-drain output (no
protective diode on the side
of VDD)
2
XOUT
Crystal oscillator connect pin (32,768 Hz)
3
XIN
(Cd built in, Cg external)
4
VSS
Negative power supply pin (GND)
5
CS
Chip select input pin
During “H”: The SIO pin allows data I/O.
The SCK pin allows data input.
During “L”:
The SIO pin is in the Hi-Z state.
The SCK pin is in the input-disabled
state.
CMOS input (built-in pull-
down resistance. No
protective diode on the side
of VDD)
6
SCK
Serial clock input pin
Data I/O from the SIO pin is performed in
synchronization with this clock. However, clock
input is not accepted while the CS pin is “L.”
CMOS input (no protective
diode on the side of VDD)
7
SIO
Serial data I/O pin
It is normally in the Hi-Z state while the CS pin is
“L.” When the CS pin changes from “L” to “H,” the
SIO pin is set to an input pin. It will then be set to
an input or output pin, depending on the
subsequently input command.
Nch open-drain output (no
protective diode on the side
of VDD)
CMOS input
8
VDD
Positive power supply pin
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