參數(shù)資料
型號: S-3511A
廠商: Seiko Instruments Inc.
英文描述: CMOS Real-Time Clock IC(3 Lines)(3線,CMOS實時時鐘芯片)
中文描述: CMOS實時時鐘IC(3線)(3線,實時時鐘芯片的CMOS)
文件頁數(shù): 12/31頁
文件大?。?/td> 183K
代理商: S-3511A
Real-Time Clock
S-3511A
Seiko Instruments Inc.
11
5.
Interrupt
Note 1 : If changing an output mode, give care to the state of the INT register and output.
Note 2 : If per-minute edge interrupt output or per-minute steady interrupt output is chosen, the INT register have no meaning.
NO.
INTAE
INTME
INTFE
Description
0
0
0
0
Output disabled
1
*
0
1
Selected frequency steady interrupt output
2
*
1
0
Per-minute edge interrupt output
3
*
1
1
Per-minute steady interrupt output
4
1
0
0
Alarm interrupt output
Note * : Don't care.
Table 4 Interrupt description
There are five types of output format from the INT terminal, which are selected by the INTAE, INTME and INTFE bits of the
status register.
(1) Alarm interrupt output
Alarm interrupt is enabled by setting hour and minute data to the INT register and turning the status register's INTAE to "1"
and INTME and INTFE to "0". When set hour data is met, low is output from the INT terminal. Since the output is held,
rewrite INTAE of the status register to "0" through serial communication to turn the output to high (OFF state).
(2) Selected frequency steady interrupt output
When you set frequency/duty data to the INT register and turn the status register's INTME to "0" and INTFE to "1" , clock set
at the INT register is output from the INT terminal.
(3) Per-minute edge interrupt output
When a first minute carry is performed after the status register's INTME is set with "1" and INTFE with "0", low is output from
the INT terminal. Since the output is held, rewrite INTAE, INTME and INTFE of the status register through a serial
communication. When you perform DISABLE or ENABLE communication while the minute carry processing signal is being
retained (for 10 msec), "Low" signal is output from the INT terminal again.
(4) Per-minute steady interrupt output
When a first carry is performed after the status register's INTME and INTFE are set with "1" , clock is output from the INT
terminal with a period of one minute (50% duty). When you perform DISABLE or ENABLE communication while the INT
terminal is at "L", "Low" signal is output from the INT terminal again.
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