參數(shù)資料
型號(hào): S-3511A
廠商: Seiko Instruments Inc.
英文描述: CMOS Real-Time Clock IC(3 Lines)(3線,CMOS實(shí)時(shí)時(shí)鐘芯片)
中文描述: CMOS實(shí)時(shí)時(shí)鐘IC(3線)(3線,實(shí)時(shí)時(shí)鐘芯片的CMOS)
文件頁(yè)數(shù): 3/31頁(yè)
文件大?。?/td> 183K
代理商: S-3511A
Real-Time Clock
S-3511A
2
Seiko Instruments Inc.
Pin Assignment
Description of Terminals
Terminal
Num.
Abbreviation
Description
Configuration
1
INT
Alarm interrupt output terminal.
Depending on the mode set by the INT
register and status register, it outputs low
or Clock when time is reached. It is
disabled by rewriting the status register.
Crystal oscillator connect terminal (32,768 HZ)
(Internal Cd, External Cg)
N-channel open drain output
(No protective diode on the
side of VDD)
2
XIN
3
XOUT
4
VSS
Negative power supply terminal (GND)
Chip select input terminal.
During "H": The SIO terminal allows data
input/output.
The SCK terminal allows data
input.
During "L": The SIO terminal is in the High-Z
state.
The SCK terminal is in the input-disabled state.
Serial clock input terminal.
The input/output of data from the SIO
terminal is performed in synchronization with
this clock. However, the clock is not accepted
while the CD terminal is "L."
Serial data input/output terminal.
It is normally in the High-Z state while the
CS terminal is "L." When the CS terminal
changes from "L" to "H", the SIO terminal
is set to an input terminal. It will be set to
an input or output terminal, depending on
an subsequently input command.
Positive power supply terminal.
5
CS
CMOS input (Included pull-
down resistance. No
protective diode on the side
of VDD)
6
SCK
CMOS input (No protective
diode on the side of VDD)
7
SIO
N channel open drain output
(No protective diode aon the
side of VDD)
CMOS input
8
VDD
Table 1 Description of terminals
Figure 2
Pin assignment
8-Pin SSOP
Top view
XOUT
VSS
6
5
8
7
3
4
1
2
SIO
SCK
CS
VDD
XIN
INT
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