參數(shù)資料
型號(hào): S-3510
廠商: Seiko Instruments Inc.
英文描述: CMOS Real-Time Clock IC (3 Lines)(3線,CMOS實(shí)時(shí)時(shí)鐘芯片)
中文描述: CMOS實(shí)時(shí)時(shí)鐘IC(3線)(3線,實(shí)時(shí)時(shí)鐘芯片的CMOS)
文件頁(yè)數(shù): 7/24頁(yè)
文件大?。?/td> 166K
代理商: S-3510
REAL-TIME CLOCK
S-3510
Series
6
Seiko Instruments Inc.
AC Characteristics 1
(S-3510ANFJX, S-3510AEFJA, R
L1
=30 k
, C
L1
=50 pF)
Table 8
Conditions
:
V
DD
=1.7 V to 5.5 V, Ta=-20
°
C to 70
°
C, Interface voltage Vcc=5.0 V
Input: V
IH
=0.8
×
V
DD
, V
IL
=0.2
×
V
DD
, Output: V
OH
=0.8
×
V
CC
, V
OL
=0.2
×
V
CC
Parameter
Symbol
t
SCK
t
DS
t
CSH
t
ISU
t
IHO
t
ACC
t
CSS
t
DH
t
R
,
t
F
Min.
Typ.
Max.
Unit
Clock pulse width
Setup time prior to the rising of the CS
Hold time after the rising of the CS
Input data setup time
Input data hold time
Output data determination time
Setup time prior to the falling of the CS
Hold time after the falling of the CS
Input rising/falling time
5
1
1
1
1
1
1
250000
3.5
0.1
μ
s
μ
s
μ
s
μ
s
μ
s
μ
s
μ
s
μ
s
μ
s
AC Characteristics 2
(S-3510ACFJX, S-3510ADFJA, S-3510AFFJA, C
L1
=50 pF)
Table 9
Conditions : V
DD
=5.0
±
0.5 V, Ta=-20
°
C to 70
°
C
Input: V
IH
=0.8
×
V
DD
, V
IL
=0.2
×
V
DD
, Output: V
OH
=0.8
×
V
DD
, V
OL
=0.2
×
V
DD
Parameter
Symbol
Min.
Typ.
Max.
Unit
Clock pulse width
t
SCK
0.5
250000
μ
s
Setup time prior to the rising of the CS
t
DS
0.1
μ
s
Hold time after the rising of the CS
t
CSH
0.1
μ
s
Input data setup time
t
ISU
0.1
μ
s
Input data hold time
t
IHO
0.1
μ
s
Output data determination time
t
ACC
0.3
μ
s
Setup time prior to the falling of the CS
t
CSS
0.1
μ
s
Hold time after the falling of the CS
t
DH
0.1
μ
s
Input rising/falling time
t
R
,
t
F
0.05
μ
s
AC Characteristics 3
(S-3510ACFJX, S-3510ADFJA, S-3510AFFJA, C
L1
=50 pF)
Table 10
Conditions : V
DD
=3.0
±
0.6 V, Ta=-20
°
C to 70
°
C
Input: V
IH
=0.8
×
V
DD
, V
IL
=0.2
×
V
DD
, Output: V
OH
=0.8
×
V
DD
, V
OL
=0.2
×
V
DD
Parameter
Symbol
Min.
Typ.
Max.
Unit
Clock pulse width
t
SCK
1.0
250000
μ
s
Setup time prior to the rising of the CS
t
DS
0.2
μ
s
Hold time after the rising of the CS
t
CSH
0.2
μ
s
Input data setup time
t
ISU
0.2
μ
s
Input data hold time
t
IHO
0.2
μ
s
Output data determination time
t
ACC
0.6
μ
s
Setup time prior to the falling of the CS
t
CSS
0.2
μ
s
Hold time after the falling of the CS
t
DH
0.2
μ
s
Input rising/falling time
t
R
,
t
F
0.05
μ
s
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