
RS5C317A/B
3
Pin No.
1
2
3
8
5
6
11
10
13
4
14
7
9, 12
PIN DESCRIPTIONS
Symbol
CE
SCLK
(A type)
SCLK
(B type)
SIO
INTR
ALRM
TMOUT
OSCIN
OSCOUT
32KOUT
CLKC
VDD
VSS
NC
Name
Chip enable input
Shift clock input
Serial input/output
Interrupt output
Alarm output
Timer output
Oscillator circuit
input/output
32kHz output
Control input for
32kHz output
Positive/Negative
power supply input
No Connection
Description
The CE pin is used to interface the CPU and is accessible when held at the high
level. This pin is connected to a pull-down resistor. It should be switched to the
low level or opened when not accessed or when powering off the system. Holding
the CE pin high for more than 2.5 seconds forces 1Hz interrupt pulses to be output
from the INTR pin for oscillation frequency measurement. (No “1Hz pulse” is out-
put for less than 1.5 seconds.)
This pin is used to input shift clock pulses to synchronize data input to, and output
from, the SIO pin. SCLK and SCLK are for writing data at falling and rising edge of
clock pulses respectively and also reading data at rising and falling edge of clock
pulses respectively.
The SIO pin inputs and outputs written or read data in synchronization with shift
clock pulses from the SCLK/SCLK pin. The SIO pin causes high impedance when
CE pin is held at the low level (CMOS input/output). After the CE pin is switched
to the high level and the control bits and the address bits are input from the SIO,
the SIO pin performs serial input and output operations.
The INTR pin outputs periodic interrupt pulses and alarm interrupt to the CPU.
This pin functions as an Nch open drain output even when the CE pin is held at the
low level.
The ALRM pin outputs alarm interrupt to the CPU. This pin functions as an Nch
open drain output even when the CE pin is held at the low level.
TMOUT pin outputs timer counter output pulses for watch-dog-timer and free-run-
timer. This pin functions as an Nch open drain output even when the CE pin is
held at the low level. Timer function is disabled and TMOUT is OFF state when
the RS5C317 is in the oscillation halt sensing state.
These pins configure an oscillator circuit by connecting a 32.768kHz crystal oscilla-
tor between the OSCIN and OSCOUT pins and by connecting a capacitor between
the OSCIN and Vss pins. (Any other oscillator circuit components are built into
the RS5C317A/B.)
32kHz clock output pin for peripheral circuit.
The 32kHz clock output is controlled by CLKC pin and 32kHz control register.
The 32KOUT pin outputs 32kHz clock when the CLKC pin is held at high and
CLEN=0, and this pin is held at high impedance state when the CLKC pin and
CLEN is in any other states and even when the CLKC pin is open. CMOS output.
Control pin for an output of the 32KOUT pin. This pin incorporates a pull-down-
resistor.
V
DD
and V
SS
is connected to power supply and ground respectively.
Ordinarily connected to V
SS
pin.