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參數(shù)資料
| 型號： | RS5C317B |
| 廠商： | RICOH COMPANY LTD |
| 元件分類： | XO, clock |
| 英文描述： | ULTRA-COMPACT HIGH PERFORMANCE SERIAL REAL-TIME CLOCK ICs |
| 中文描述： | 0 TIMER(S), REAL TIME CLOCK, PDSO14 |
| 封裝： | 0.65 MM PITCH, SSOP-14 |
| 文件頁數(shù)： | 24/40頁 |
| 文件大?。?/td> | 309K |
| 代理商： | RS5C317B |
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RS5C317A/B
20
Considerations
5. CE Pin
1) Switching the CE pin to the high level enables the SCLK/SCLK and SIO pins, allowing data to be serially read
from and written to the SIO pin in synchronization with shift clock pulses input from the SCLK/SCLK pin.
2) Switching the CE pin to the low level or opening disables the SCLK/SCLK and SIO pins, causing high imped-
ance and resetting the internal interfacing circuits such as the shift register. While data of the address register
and bank bit which have been written just before should be preserved.
3) The CE pin should be held at the low level or open state when no access is made to the RS5C317.
The CE pin incorporates a pull-down resistor.
4) During system power-down (being back-up battery powered), the low-level input of the CE pin should be brought
as close as possible to the VSS level to minimize the loss of charge in the battery.
5) Holding the CE pin at the high level for more than 2.5 seconds mainly forces 1Hz interrupt pulses to be output
from the INTR pin for oscillation frequency measurement. When the CE pin is held at the high level for less
than 1.5 seconds, no pulse is output.
6) The CE pin should be held at the low level in order to enable oscillator halt sensing. Holding the CE pin at the
high level, therefore, disables oscillator halt sensing, retaining the value of the XSTP (oscillator halt sensing) bit
which exists immediately before the CE pin is switched to the high level.
*
)
RS5C317A: SCLK
RS5C317B: SCLK
When the power turns on from 0V, the CE pin should be set low or open once.
SCLK/SCLK
*
SIO
CE
Shift clock pulses
Address Data
Write Data
Read Data
Read control bit
Control bit
相關(guān)PDF資料 |
PDF描述 |
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| RS5C321A | ULTRA-COMPACT SERIAL REAL-TIME CLOCK ICs WITH 32.768kHz |
| RS5C321B | ULTRA-COMPACT SERIAL REAL-TIME CLOCK ICs WITH 32.768kHz |
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| RS5C321A | 制造商:RICOH 制造商全稱:RICOH electronics devices division 功能描述:ULTRA-COMPACT SERIAL REAL-TIME CLOCK ICs WITH 32.768kHz |
| RS5C321A/B | 制造商:RICOH 制造商全稱:RICOH electronics devices division 功能描述:real-time clock ICs |
| RS5C321B | 制造商:RICOH 制造商全稱:RICOH electronics devices division 功能描述:ULTRA-COMPACT SERIAL REAL-TIME CLOCK ICs WITH 32.768kHz |
| RS5C338A | 制造商:RICOH 制造商全稱:RICOH electronics devices division 功能描述:3-WIRE SERIAL INTERFACE REAL-TIME CLOCK ICs WITH VOLTAGE MONITORING FUNCTION |
| RS5C338A-E2 | 制造商:RICOH 制造商全稱:RICOH electronics devices division 功能描述:3-WIRE SERIAL INTERFACE REAL-TIME CLOCK ICs WITH VOLTAGE MONITORING FUNCTION |
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