參數(shù)資料
型號(hào): RP5C62
廠商: RICOH COMPANY LTD
元件分類: XO, clock
英文描述: REAL-TIME CLOCK
中文描述: 1 TIMER(S), REAL TIME CLOCK, PDIP18
封裝: DIP-18
文件頁數(shù): 5/48頁
文件大?。?/td> 419K
代理商: RP5C62
REAL-TIME CLOCK
1
RP/RF/RS5C62
OUTLINE
The RP/RF/RS5C62 are CMOS LSIs which serve microcomputers as real-time clocks providing time, calendar,
and alarm functions in direct coupling with the data buses of CPUs such as 8086 and 68000. A built-in timer counter
acts as a watchdog timer or interrupt timer. They are available in three different types of packages: the DIP type,
the SOP type, and the SSOP type.
Directly connected to CPU, enabling fast access.
4bit bidirectional data bus, and 4bit address bus.
The oscillator is driven by a constant voltage, so the oscillation frequency is stable even when the power supply
voltage fluctuates.
Built-in timer counter using internal clock.
Generates cyclic CPU interrupts, and generates alarm-match interrupts.
Interrupt flag and interrupt inhibit.
Clock (hour, minute, second), calendar (leap year, year, month, day, day-of-the-week), alarm (hour, minute).
12-or 24-hour mode is selectable.
Recognizes leap years automatically.
All clock and alarm data expressed in BCD codes.
±30 seconds adjustment function.
Determines whether clock data is valid or invalid.
Consumes very low power due to CMOS technology, so it can be backed up by batteries.
Power supply voltage between 3.0 to 5.0V.
Time keeping supply voltage between 2.0 to 6.0V.
Package : 18pin DIP for RP5C62, 18pin SOP for RF5C62, 20pin SSOP for RS5C62.
FEATURES
BLOCK DIAGRAM
INTERRURT
CONTROL
TIMER
CONTROL REGISTER
ADDRESS BUS
CONTROL
DATA BUS
CONTROL
D0D1D2
DIV
OSC DETECT
OSC
OSCIN
OSCOUT
CE
CS
D3
A0A1A2A3
ADDRESS
DECODER
ALARM REGISTER
COMPARATOR
WATCH & CALENDAR
VDD
VSS
TMOUT
RD
WR
INTR
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