參數(shù)資料
型號(hào)： RF5C396L
廠商： RICOH COMPANY LTD
元件分類： 總線控制器
英文描述： TRI N PLUG F PLAS 0-48
中文描述： PCMCIA BUS CONTROLLER, PQFP208
封裝： 1.70 MM HEIGHT, PLASTIC, LQFP-208
文件頁數(shù)： 45/93頁
文件大小： 449K
代理商： RF5C396L
RF5C296/RF5C396L/RB5C396/RF5C396
41
Index : 1Fh
Default value : 0000 0000b
Read & Write
bit7 : When set to “1”, this bit specifies disabling bit7 in the data bus for an I/O address of 377h or 3F7h (at read
time). When set to “0”, this bit specifies no such disabling. This bit defaults to “0” and can be set indepen-
dently of bit0.
bit6 : In PCMCIA-ATA mode, the value of this bit appears at CA25.
bit5 : In PCMCIA-ATA mode, the value of this bit appears at CA24.
bit4 : In PCMCIA-ATA mode, the value of this bit appears at CA23.
bit3 : In PCMCIA-ATA mode, the value of this bit appears at CA22.
bit2 : In PCMCIA-ATA mode, the value of this bit appears at CA21.
bit1 : In PCMCIA-ATA mode, if this bit is set to “1”, the SPKR# input works as an LED input and IRQ12 works as an
open drain LED output. Default value is “0”.
bit0 : PCMCIA-ATA mode bit. “1” selects PCMCIA-ATA mode and “0” selects PCMCIA mode. Default value is “0”.
Index : 2Fh
Default value : 0000 0000b
Read & Write
bit7 to bit6 : DMA Request Selection Bits. DREQ from PC Card is defined according to these 2 bits. Default values
are “0”.
bit5
: If this bit is set to “1”, DREQ is “L” active. If this bit is set to “0”, DREQ is “H” active. Default value is
“0”.
: DMA Mode TC Selection Bit.
If this bit is set to “0”, IRQ11 works as TC. If this bit is set to “1”, IRQ15 works as TC.
: Direct 5V/3.3V Switch Enable. If bit4 of Power and RESETDRV Control Register is set to “1”, setting
this bit to “1” will allow the status of 5VDET/GPI pin to select VCC3EN# or VCC5EN# independently of
bit0. Default value is “0”.
: Input Acknowledge Enable. If this bit is set to “1”, INPACK# pin function is enabled. If this bit is set to
“0”, INPACK# is disabled. When the input INPACK# pin signal is active, I/O read data are output to the
system data bus only if the input INPACK# pin signal is held at “L”. Default value is “0”.
: IREQ# Sense Selection Bit. If this bit is set to “0”, IREQ# is “L”active. If this bit is set to “1”, IREQ# is
“H”active. Default value is “0”.
: Voltage Selection Bit. If bit4 of Power and RESETDRV Control Register is set to “1”, setting this bit to
“1” will set VCC3EN# “L”. If bit4 of Power and RESETDRV Control Register setting this bit to “0” will
set VCC5EN# “L”. Default value is “0”.
bit4
bit3
bit2
bit1
bit0
bit 7 bit 6
DREQ
01
INPACK#
10
SPKR#/LED#
11
IOIS16#
4. Expansion Function
4.2 Mode Control Register 2
4.1 Mode Control Register 1
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