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參數(shù)資料
| 型號： | RF5C396L |
| 廠商： | RICOH COMPANY LTD |
| 元件分類： | 總線控制器 |
| 英文描述： | TRI N PLUG F PLAS 0-48 |
| 中文描述： | PCMCIA BUS CONTROLLER, PQFP208 |
| 封裝： | 1.70 MM HEIGHT, PLASTIC, LQFP-208 |
| 文件頁數(shù)： | 33/93頁 |
| 文件大?。?/td> | 449K |
| 代理商： | RF5C396L |
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RF5C296/RF5C396L/RB5C396/RF5C396
29
bit4 to bit0 : Power Control Bits. These bits cooperate with bit0 in the Mode Control Register (Index : 2Fh) to set the
VCC3EN, VCC5EN, VPP_EN1, and VPP_EN0 pin signals to “0” or “1” as shown in the table below :
bit4
bit3*
1
bit2*
1
bit1
bit0
bit0 of Mode
Control Register
0
VCC3EN#
VCC5EN#
VPP_EN1*
2
VPP_EN0*
3
Index : 04h
bit7tobit5 : Reserved
bit4
Default value : 0000 0000h Read & Write
: GPI Change Bit. This bit will be set upon generation of any interrupt due to the GPI pin status change.
This bit is held at “0” unless the GPI Enable Bit is set to “1” in the Card Detect and General Control
Register.
: Card Detect Change. Bit is set to “1” when a change has been detected on either the CD#1 or CD2# pin.
: Ready Change. Bit is set to “1” when a low to high has been detected on the Ready/Busy# pin. Bit reads
“0” for I/O cards.
: Bit is set to “1” when Battery Warning Condition has been detected. For the Battery Warning Condition,
see the description of bits1 and 0 in the Interface Status Register (Index : 01h). Bit reads “0” for I/O
cards.
: Bit is set to “1” when Battery Dead Condition has been detected for memory card. For the Battery
Warning Condition, see the description of bits1 and 0 in the Interface Status Register (Index : 01h).
For I/O cards, bit is set to “1” if Ring Indicate Enable bit in the Interrupt and General Control Register is
set to “0” and STSCHG#/RI# signal from I/O card has been pulled low. This bit reads “0” for I/O cards
if the Ring Indicate Enable bit in the Interrupt and General Control Register is set to “1”.
bit3
bit2
bit1
bit0
1
′
′
0
0
1
1
0
0
1
1
1
1
1
1
1
0
′
′
0
0
0
1
1
1
1
0
1
1
0
0
1
1
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
0
0
1
1
1
1
1
0
1
1
0
0
1
1
0
′
′
′
′
′
′
′
′
′
′
′
′
′
′
′
′
′
*
1) bit3 and bit2 : don't care. VCCnEN# means VCC5EN# or VCC3EN#, this signal defined by voltage selection.
*
2) The settings of bits 3 and 2 are don't care. The settings of the VPP_EN1 and VPP_EN0 pin signals to “0” and “0”, “0” and “1”, “1” and “0”, and “1” and
“1” specify their connection to no pin, connection to the VCC pin, connection to the VPP pin, and reservation, respectively.
1.4 Card Status Change Register
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