
RF5C296/RF5C396L/RB5C396/RF5C396
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All of the control registers of the RF5C296/RF5C396 are 8bit width registers and can be accessed using an indi-
rect indexing scheme. Only two I/O addresses such as (3E1h) and (3E0h) are used to access all control registers.
RF5C296/RF5C396 has the external decode mode. In this mode, I/O address is decoded outside and input to
CS#. When RESETDRV falls, if the level of INTR# pin is “H” (“L”), internal decode mode (external decode mode)
can be selected.
Consequently, these operations can be enabled by externally pulling up or down the INTR# pin to such a degree
as not to affect normal operation.
In the Internal Decode Mode, too, the CS# pin should be caused to transition to low level at the time of internal
register access (the CS# pin should be caused to transition to high level only in the Power Down Mode).
The Index Register has the bit settings shown below :
Index Register (3E0h)
bit7
“0”: Device#0
“1”: Device#1
bit6
“0”: Slot#0
“1”: Slot#1
bit5
bit4
bit3
bit2
bit1
bit0
Register Index
There are 56 control registers provided for each PC card slot. The Index Register has bit7 for indicating a device
number depending on the status of the SPKROUT# pin for the RF5C396 or the RI_OUT# pin for the RF5C296 at the
falling edge of the RESETDRV pin signal. For the RF5C296, in particular, the Index Register has bit6 (Slot bit) for
indicating a device number depending on the status of the SPKROUT# pin at the falling edge of the RESETDRV pin
signal.
Both the SPKROUT# and RI_OUT# pins operate in the same manner as the INTR# pin described above.
The status of the SPKROUT# pin (for the RF5C396) or the RI_OUT# pin (for the RF5C296) corresponds to the
index range as shown in the tables in “7. Plural (Three) Slot Systems” on the next page. Note that these pins also
require their status control for connecting a single unit of the RF5C296 or the RF5C396.
6. Internal Register Access