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PRODUCT SPECIFICATION
RC5053
3
P
8
I
FB
Current Limit Sense Pin.
Connect to the switching node between the source
of Q1 and the drain of Q2. If I
FB
drops below I
MAX
when G1 is on, the RC5053
will go into current limit. The current limit circuit can be disabled by floating
I
MAX
and shorting I
FB
to V
CC
through an external 10k resistor.
Soft Start.
Connect to an external capacitor to implement a soft start function.
During moderate overload conditions, the soft start capacitor will be
discharged slowly in order to reduce the duty cycle. In hard current limit, the
soft start capacitor will be forced low immediately and the RC5053 will rerun a
complete soft start cycle. C
SS
must be selected such that during power-up the
current through Q1 will not exceed the current limit value.
External Compensation.
The COMP pin is connected directly to the output of
the error amplifier and the input of the PWM comparator. An RC+ C network is
used at this node to compensate the feedback loop to provide optimum
transient response.
Over-Temperature Fault.
OT is an open-drain output and will be pulled low if
OUTEN is less than 2V.
Overvoltage Fault.
FAULT is an open-drain output. If V
OUT
reaches 15%
above the nominal output voltage, FAULT will go low and G1 and G2 will be
disabled. Once triggered, the RC5053 will remain in this state until the power
supply is recycled or the OUTEN pin is toggled. If OUTEN = 0, FAULT floats or
is pulled high by an external resistor.
Power Good.
This is an open-drain signal to indicate validity of output
voltage. A high indicates that the output has settled to within
±
5% of the rated
output for more than 1ms. PWRGD will go low if the output is out of regulation
for more than 500
μ
s. If OUTEN = 0, PWRGD pulls low.
Digital Voltage Select.
TTL inputs used to set the regulated output voltage
required by the processor (Table 3). There is an internal 20k
pull-up at each
pin. When all five VIDn pins are high or floating, the chip will shut down.
Output Enable.
TTL input which enables the output voltage.The external
MOSFET temperature can be monitored with an external thermistor as shown
in Figure 6. When the OUTEN input voltage drops below 2V, OT trips. As
OUTEN drops below 1.7V, the drivers are internally disabled to prevent the
MOSFETs from heating further. If OUTEN is less than 1.2V for longer than
30
μ
s, the RC5053 will enter shutdown mode. The internal oscillator can be
synchronized to a faster external clock by applying the external clocking signal
to the OUTEN pin.
Gate Drive for the Upper N-Channel MOSFET, Q1.
This output will swing
from PV
CC
to GND. It will always be low when G2 is high or the output is
disabled.
9
SS
10
COMP
11
OT
12
FAULT
13
PWRGD
18, 17, 16,
15, 14
VID0, VID1, VID2,
VID3, VID4
19
OUTEN
20
G1
Absolute Maximum Ratings
1
Parameter
Supply Voltage
V
CC
PV
CC
Input Voltage
I
FB
(Note 2)
I
MAX
All Other Inputs
Min.
Typ.
Max.
7V
13.5V
PV
CC
+ 0.3V
13V
V
CC
+ 0.3V
-0.3V
-0.3V
Pin Definitions
(continued)
Pin Number
Pin Name
Pin Description