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RC7316
PRODUCT SPECIFICATION
2
Pin Assignments
Pin Descriptions
Pin Name
C
VOL
Pin Number
6, 5
Pin Function Description
Bypass capacitor for V
be bypassed to the ground plane with a 1,000 pF chip capacitor placed as close
to the pin as possible.
Chip ground. Should be connected to the printed circuit board's ground plane at
the pin.
Differential digital inputs. When INH is true (i.e. INH+ > INH-) the driver is forced
into the high impedance state. Although these inputs are normally driven by
ECL signals, they have a wide enough common mode range that any one of the
inputs may be driven by a TTL or CMOS signal provided that the other input is
tied to the appropriate threshold voltage.
Slew rate control for the positive edge. Slew rate of the positive edge changes
as the control voltage is changed from -2.0V to +2.0V. +SRC can also be
programmed with a current DAC or set to a fixed value using a resistor.
Optionally, pin 4 can be NC. (No Connection)
Slew Rate Control for the negative edge. Slew rate of the negative edge
changes as the control voltage is changed from -2.0V to +2.0V. -SRC can also
be programmed with a current DAC or set to a fixed value using a resistor.
Optionally, pin 2 can be NC. (No Connection)
Active low output notifies thermal shutdown has occurred. In the event of a
short circuit or other fault that causes the die temperature to become
excessively large, the thermal shutdown will kick in at a die temperature
between 115
°
C and 160
°
C. If the fault persists, the device will toggle back and
forth between shutdown and normal operation at a frequency in the tens of
Hertz. TS is an open collector output capable of driving two standard TTL loads.
The TS pins of several drivers may be wire-ORed together and input to a latch
to indicate an alarm condition. Optionally, pin 8 can be NC.
Quiet positive supply. The nominal value is 10V
levels (V
OH
) greater than the nominal value of +7V, V
above the maximum value of V
OH
. Whenever V
at the output low level, V
CC
should also be lowered by the same amount. V
should be bypassed to ground with a 10,000 pF chip capacitor placed as close
to the pins as possible.
, C
VOH
OH
and V
OL
respectively. Pins C
VOL
and C
VOH
should
GND
1, 9
INH+, INH-
13, 14
+SRC
4
–SRC
2
TS
8
V
CC
16
±
3%. For output high voltage
CC
should be raised 3V
EE
is lowered to provide margin
CC
RC7316TEL
16-Lead Hybrid
Flatpack
(Top View)
GND
–SRC
V
OTERM
+SRC
C
VOH
C
VOL
V
L
TS
V
CC
V
EE
INH+
INH-
V
IN+
V
IN–
V
H
GND
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
65-7316-02
Description
The pin driver is available in 50
(TEL) configurations. The RC7316TEL is pin-for-pin com-
patible with Analog Devices’ AD1321, AD1322 and
AD1324 drivers.
(continued)
W
series terminated RC7316
The RC7316 is implemented using Fairchild Semiconduc-
tor’s high frequency BiCMOS process.