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RC7108
PRODUCT SPECIFICATION
8
Writing Data Bytes
Each bit of the 10 data bytes controls a particular device
function except for the “reserved bits”. These must be pre-
served by writing a logic 0. Bit 7, the MSB, is written first.
See Table 4 for bit descriptions of Data Bytes 1-4.
Table 5 shows additional frequency selections that are
programmable via the serial data interface.
Table 7 shows the mode select functions for Byte 3, bits 1
and 0.
Table 4. Data Bytes 1-4 Serial Configuration Map
Bit(s)
Data Byte 1
7
6
5
4
3
2
1
0
Data Byte 2
7
6
5
4
3
2
1
0
Data Byte 3
7
6
5
4
3
2
1
0
Data Byte 4
7
6
5
4
3
2
1
0
Affected Pin
Pin No.
Control Function
Bit Control
Default
Pin Name
0
1
-
-
-
-
-
-
(Reserved)
(Reserved)
(Reserved)
Clock Output Disable
Clock Output Disable
(Reserved)
(Reserved)
(Reserved)
-
-
-
-
-
-
0
0
0
1
1
0
0
0
27
26
-
-
-
24MHz
48MHz
-
-
-
Disable
Disable
-
-
-
Enable
Enable
-
-
-
31
32
34
35
36
38
39
40
SDRAM7
SDRAM6
SDRAM5
SDRAM4
SDRAM3
SDRAM2
SDRAM1
SDRAM0
Clock Output Disable
Clock Output Disable
Clock Output Disable
Clock Output Disable
Clock Output Disable
Clock Output Disable
Clock Output Disable
Clock Output Disable
Disable
Disable
Disable
Disable
Disable
Disable
Disable
Disable
Enable
Enable
Enable
Enable
Enable
Enable
Enable
Enable
1
1
1
1
1
1
1
1
20
19
17
16
15
13
12
11
PCI7
PCI6
PCI5
PCI4
PCI3
PCI2
PCI1
PCI0
Clock Output Disable
Clock Output Disable
Clock Output Disable
Clock Output Disable
Clock Output Disable
Clock Output Disable
Clock Output Disable
Clock Output Disable
Disable
Disable
Disable
Disable
Disable
Disable
Disable
Disable
Enable
Enable
Enable
Enable
Enable
Enable
Enable
Enable
1
1
1
1
1
1
1
1
-
8
7
-
-
(Reserved)
Clock Output Disable
Clock Output Disable
(Reserved)
Clock Output Disable
(Reserved)
Clock Output Disable
Clock Output Disable
-
-
0
1
1
0
1
0
1
1
3V66-1
3V66-0
-
IOAPIC
-
CPU1
CPU0
Disable
Disable
-
Disable
-
Disable
Disable
Enable
Enable
-
Enable
-
Enable
Enable
46
-
43
44