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參數(shù)資料
| 型號： | RC32434-350BC |
| 廠商： | Integrated Device Technology, Inc. |
| 英文描述： | IDT TInterprise Integrated Communications Processor |
| 中文描述： | IDT公司TInterprise集成通信處理器 |
| 文件頁數(shù)： | 15/53頁 |
| 文件大小： | 444K |
| 代理商： | RC32434-350BC |
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15 of 53
January 19, 2006
IDT RC32434
AC T iming Definitions
Below are examples of the AC timng characteristics used throughout this document.
Figure 2 AC Timing Definitions Waveform
S ymbol
Definition
Tper
Clock period.
Tlow
Clock low. Amount of time the clock is low in one clock period.
Thigh
Clock high. Amount of time the clock is high in one clock period.
Trise
Rise time. Low to high transition time.
Tfall
Fall time. High to low transition time.
Tjitter
Jitter. Amount of time the reference clock (or signal) edge can vary on either the rising or falling edges.
Tdo
Data out. Amount of time after the reference clock edge that the output will become valid. The mnimumtime represents the data output hold.
The maximumtime represents the earliest time the designer can use the data.
Tzd
Z state to data valid. Amount of time after the reference clock edge that the tri-stated output takes to become valid.
Tdz
Data valid to Z state. Amount of time after the reference clock edge that the valid output takes to become tri-stated.
Tsu
Input set-up. Amount of time before the reference clock edge that the input must be valid.
Thld
Input hold. Amount of time after the reference clock edge that the input must remain valid.
Tpw
Pulse width. Amount of time the input or output is active for asynchronous signals.
Tslew
Slew rate. The rise or fall rate for a signal to go froma high to low, or low to high.
X(clock)
Timng value. This notation represents a value of ‘X’ multiplied by the clock time period of the specified clock. Using 5(CLK) as an example:
X = 5 and the oscillator clock (CLK) = 25MHz, then the timng value is 200.
Tskew
Skew. The amount of time two signal edges deviate fromone another.
Table 4 AC Timing Definitions
Tdz
Tzd
Tdo
Tpw
Thld
Tsu
Tlow
Thigh
Tper
clock
Output signal 1
Output signal 2
Input Signal 1
Signal 1
Tjitter
Trise
Tfall
Tdo
Signal 2
Signal 3
Tskew
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PDF描述 |
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| RC32434-350BCI | IDT TInterprise Integrated Communications Processor |
| RC32434-400BC | IDT TInterprise Integrated Communications Processor |
| RC32434-400BCI | IDT TInterprise Integrated Communications Processor |
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| RC32434-350BCI | 制造商:IDT 制造商全稱:Integrated Device Technology 功能描述:IDT TInterprise Integrated Communications Processor |
| RC32434-400BC | 制造商:IDT 制造商全稱:Integrated Device Technology 功能描述:IDT TInterprise Integrated Communications Processor |
| RC32434-400BCI | 制造商:IDT 制造商全稱:Integrated Device Technology 功能描述:IDT TInterprise Integrated Communications Processor |
| RC3-25V220M | 制造商:ELNA America Inc 功能描述: |
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