- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄11678 > R5F562N8ADFB#V0 (Renesas Electronics America)MCU 32BIT FLASH 512KROM 144LQFP PDF資料下載
參數(shù)資料
| 型號： | R5F562N8ADFB#V0 |
| 廠商： | Renesas Electronics America |
| 文件頁數(shù)： | 75/148頁 |
| 文件大小： | 0K |
| 描述： | MCU 32BIT FLASH 512KROM 144LQFP |
| 產(chǎn)品培訓(xùn)模塊： | RX Compare Match Timer RX DMAC |
| 標(biāo)準(zhǔn)包裝： | 1 |
| 系列： | RX600 |
| 核心處理器： | RX |
| 芯體尺寸： | 32-位 |
| 速度： | 100MHz |
| 連通性： | EBI/EMI，I²C，SCI，SPI，USB |
| 外圍設(shè)備： | DMA，LVD，POR，PWM，WDT |
| 輸入/輸出數(shù)： | 103 |
| 程序存儲器容量： | 512KB（512K x 8） |
| 程序存儲器類型： | 閃存 |
| RAM 容量： | 96K x 8 |
| 電壓 - 電源 (Vcc/Vdd)： | 2.7 V ~ 3.6 V |
| 數(shù)據(jù)轉(zhuǎn)換器： | A/D 8x10/12b，D/A 2x10b |
| 振蕩器型： | 內(nèi)部 |
| 工作溫度： | -40°C ~ 85°C |
| 封裝/外殼： | 144-LQFP |
| 包裝： | 托盤 |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁第55頁第56頁第57頁第58頁第59頁第60頁第61頁第62頁第63頁第64頁第65頁第66頁第67頁第68頁第69頁第70頁第71頁第72頁第73頁第74頁當(dāng)前第75頁第76頁第77頁第78頁第79頁第80頁第81頁第82頁第83頁第84頁第85頁第86頁第87頁第88頁第89頁第90頁第91頁第92頁第93頁第94頁第95頁第96頁第97頁第98頁第99頁第100頁第101頁第102頁第103頁第104頁第105頁第106頁第107頁第108頁第109頁第110頁第111頁第112頁第113頁第114頁第115頁第116頁第117頁第118頁第119頁第120頁第121頁第122頁第123頁第124頁第125頁第126頁第127頁第128頁第129頁第130頁第131頁第132頁第133頁第134頁第135頁第136頁第137頁第138頁第139頁第140頁第141頁第142頁第143頁第144頁第145頁第146頁第147頁第148頁
PIC18F6520/8520/6620/8620/6720/8720
DS39609B-page 30
2004 Microchip Technology Inc.
3.1
Power-on Reset (POR)
A Power-on Reset pulse is generated on-chip when
VDD rise is detected. To take advantage of the POR
circuitry, tie the MCLR pin through a 1 k
to 10 k
resistor to VDD. This will eliminate external RC
components usually needed to create a Power-on
Reset delay. A minimum rise rate for VDD is specified
(parameter D004). For a slow rise time, see Figure 3-2.
When the device starts normal operation (i.e., exits the
Reset condition), device operating parameters (volt-
age, frequency, temperature, etc.) must be met to
ensure operation. If these conditions are not met, the
device must be held in Reset until the operating
conditions are met.
FIGURE 3-2:
EXTERNAL POWER-ON
RESET CIRCUIT (FOR
SLOW VDD POWER-UP)
3.2
Power-up Timer (PWRT)
The Power-up Timer provides a fixed nominal time-out
(parameter #33) only on power-up from the POR. The
Power-up Timer operates on an internal RC oscillator.
The chip is kept in Reset as long as the PWRT is active.
The PWRT’s time delay allows VDD to rise to an accept-
able level. A configuration bit is provided to enable/
disable the PWRT.
The power-up time delay will vary from chip-to-chip due
to VDD, temperature and process variation. See DC
parameter #33 for details.
3.3
Oscillator Start-up Timer (OST)
The Oscillator Start-up Timer (OST) provides 1024
oscillator cycles (from OSC1 input) delay after the
PWRT delay is over (parameter #32). This ensures that
the crystal oscillator or resonator has started and
stabilized.
The OST time-out is invoked only for XT, LP and HS
modes and only on Power-on Reset, or wake-up from
Sleep.
3.4
PLL Lock Time-out
With the PLL enabled, the time-out sequence following
a Power-on Reset is different from other oscillator
modes. A portion of the Power-up Timer is used to
provide a fixed time-out that is sufficient for the PLL to
lock to the main oscillator frequency. This PLL lock
time-out (TPLL) is typically 2 ms and follows the
oscillator start-up time-out.
3.5
Brown-out Reset (BOR)
A configuration bit, BOREN, can disable (if clear/
programmed), or enable (if set) the Brown-out Reset
circuitry. If VDD falls below parameter D005 for greater
than parameter #35, the brown-out situation will reset
the chip. A Reset may not occur if VDD falls below
parameter D005 for less than parameter #35. The chip
will remain in Brown-out Reset until VDD rises above
BVDD. If the Power-up Timer is enabled, it will be
invoked after VDD rises above BVDD; it then will keep
the chip in Reset for an additional time delay (parame-
ter #33). If VDD drops below BVDD while the Power-up
Timer is running, the chip will go back into a Brown-out
Reset and the Power-up Timer will be initialized. Once
VDD rises above BVDD, the Power-up Timer will
execute the additional time delay.
3.6
Time-out Sequence
On power-up, the time-out sequence is as follows:
First, PWRT time-out is invoked after the POR time
delay has expired. Then, OST is activated. The total
time-out will vary based on oscillator configuration and
the status of the PWRT. For example, in RC mode with
the PWRT disabled, there will be no time-out at all.
power-up.
Since the time-outs occur from the POR pulse, the
time-outs will expire if MCLR is kept low long enough.
Bringing MCLR high will begin execution immediately
(Figure 3-5). This is useful for testing purposes, or to
synchronize more than one PIC18FXX20 device
operating in parallel.
Table 3-2 shows the Reset conditions for some Special
Function Registers, while Table 3-3 shows the Reset
conditions for all of the registers.
Note 1:
External Power-on Reset circuit is required
only if the VDD power-up slope is too slow.
The diode D helps discharge the capacitor
quickly when VDD powers down.
2:
R < 40 k
is recommended to make sure that
the voltage drop across R does not violate
the device’s electrical specification.
3:
R1 = 1 k
to 10 k will limit any current flow-
ing into MCLR from external capacitor C, in
the event of MCLR/VPP pin breakdown due to
Electrostatic Discharge (ESD) or Electrical
Overstress (EOS).
C
R1
R
D
VDD
MCLR
PIC18FXX20
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| MAX9257GCM+ | IC SER/DESER PROG 48-LQFP |
| R5F562N7BDFB#V0 | MCU 32BIT FLASH 384KROM 144LQFP |
| MAX9257GTL+ | IC SER/DESER PROG 40-TQFN |
| R5F562N7BDLE#U0 | MCU 32BIT FLASH 384KROM 145TFLGA |
| R5F562N7ADBG#U0 | MCU 32BIT FLASH 384KROM 176LFBGA |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| R5F562N8ADFP | 制造商:Renesas Electronics Corporation 功能描述:MCU 32BIT RX62N 100QFP 制造商:Renesas Electronics Corporation 功能描述:MCU, 32BIT, RX62N, 100QFP 制造商:Renesas Electronics Corporation 功能描述:MCU, 32BIT, RX62N, 100QFP; Controller Family/Series:RX600; Core Size:32bit; No. of I/O's:72; Supply Voltage Min:2.7V; Supply Voltage Max:3.6V; Digital IC Case Style:LQFP; No. of Pins:100; Program Memory Size:512KB; RAM Memory ;RoHS Compliant: Yes 制造商:Renesas Electronics Corporation 功能描述:MCU32Bit 165MIPS ROM512KRAM32K QFP100Pin |
| R5F562N8ADFP#V0 | 功能描述:MCU 32BIT FLASH 512KROM 100LQFP RoHS:是 類別:集成電路 (IC) >> 嵌入式 - 微控制器， 系列:RX600 標(biāo)準(zhǔn)包裝:96 系列:PIC® 16F 核心處理器:PIC 芯體尺寸:8-位 速度:20MHz 連通性:I²C，SPI 外圍設(shè)備:欠壓檢測/復(fù)位，POR，PWM，WDT 輸入/輸出數(shù):11 程序存儲器容量:3.5KB（2K x 14） 程序存儲器類型:閃存 EEPROM 大小:- RAM 容量:128 x 8 電壓 - 電源 (Vcc/Vdd):2.3 V ~ 5.5 V 數(shù)據(jù)轉(zhuǎn)換器:A/D 8x10b 振蕩器型:內(nèi)部 工作溫度:-40°C ~ 125°C 封裝/外殼:14-TSSOP（0.173"，4.40mm 寬） 包裝:管件 |
| R5F562N8ADLE | 制造商:Renesas Electronics Corporation 功能描述:MCU 32BIT RX62N 145LGA 制造商:Renesas Electronics Corporation 功能描述:MCU, 32BIT, RX62N, 145LGA 制造商:Renesas Electronics Corporation 功能描述:MCU, 32BIT, RX62N, 145LGA, Controller Family/Series:RX600, Core Size:32bit, No. of I/O's:103, Supply Voltage Min:2.7V, Supply Voltage Max:3.6V, Digital IC Case Style:LGA, No. of Pins:145, Program Memory Size:512KB, RAM Memory , RoHS Compliant: Yes |
| R5F562N8ADLE#U0 | 功能描述:MCU 32BIT FLASH 512KROM 145TFLGA RoHS:是 類別:集成電路 (IC) >> 嵌入式 - 微控制器， 系列:RX600 標(biāo)準(zhǔn)包裝:1 系列:87C 核心處理器:MCS 51 芯體尺寸:8-位 速度:16MHz 連通性:SIO 外圍設(shè)備:- 輸入/輸出數(shù):32 程序存儲器容量:8KB（8K x 8） 程序存儲器類型:OTP EEPROM 大小:- RAM 容量:256 x 8 電壓 - 電源 (Vcc/Vdd):4 V ~ 6 V 數(shù)據(jù)轉(zhuǎn)換器:- 振蕩器型:外部 工作溫度:0°C ~ 70°C 封裝/外殼:44-DIP 包裝:管件 其它名稱:864285 |
| R5F562N8BDBG | 制造商:Renesas Electronics Corporation 功能描述:MCU 32BIT RX62N 176BGA 制造商:Renesas Electronics Corporation 功能描述:MCU, 32BIT, RX62N, 176BGA 制造商:Renesas Electronics Corporation 功能描述:MCU, 32BIT, RX62N, 176BGA, Controller Family/Series:RX600, Core Size:32bit, No. of I/O's:126, Supply Voltage Min:2.7V, Supply Voltage Max:3.6V, Digital IC Case Style:LFBGA, No. of Pins:176, Program Memory Size:512KB, RAM Memory , RoHS Compliant: Yes |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。