參數(shù)資料
型號: R1EX25004ATA00A
元件分類: PROM
英文描述: 512 X 8 SPI BUS SERIAL EEPROM, PDSO8
封裝: 4.40 X 3 MM, 0.65 MM PITCH, LEAD FREE, PLASTIC, TSSOP-8
文件頁數(shù): 22/22頁
文件大?。?/td> 622K
代理商: R1EX25004ATA00A
R1EX25002Axx00A/R1EX25004Axx00A
REJ03C0357-0002 Rev. 0.02 Jan.14 .2009
page 9 of 20
Functional Description
Status Register
The following figure shows the Status Register Format. The Status Register contains a number of status and control
bits that can be read or set (as appropriate) by specific instructions.
Status Register Format
1
BP1
BP0
WEL
WIP
Block Protect Bits
Write Enable Latch Bits
Write In Progress Bits
b0
b7
WIP bit: The Write In Progress (WIP) bit indicates whether the memory is busy with a Write or Write Status Register
cycle.
WEL bit: The Write Enable Latch (WEL) bit indicates the status of the internal Write Enable Latch.
BP1, BP0 bits: The Block Protect (BP1, BP0) bits are non-volatile. They define the size of the area to be protected
against Write instructions.
Instructions
Each instruction starts with a single-byte code, as summarized in the following table . If an invalid instruction is sent
(one not contained in the following table), the device automatically deselects itself.
Instruction Set
Instruction
Description
Instruction Format
WREN
Write Enable
0000
×110
WRDI
Write Disable
0000
×100
RDSR
Read Status Register
0000
×101
WRSR
Write Status Register
0000
×001
READ
Read from Memory Array
0000 A011
WRITE
Write to Memory Array
0000 A010
Notes: 1. “
×” is Don’t care.
2. “A” is A8 address on the R1EX25004A, and Don’t care on the R1EX25002A.
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