Setups data is sent from the host to the QT using the I 2
參數(shù)資料
型號(hào): QT60160-ISG QS129
廠(chǎng)商: Atmel
文件頁(yè)數(shù): 14/26頁(yè)
文件大小: 0K
描述: SENSOR IC MTRX TOUCH16KEY 32-QFN
標(biāo)準(zhǔn)包裝: 1
系列: QMatrix™
類(lèi)型: 電容性
輸入數(shù)/鍵: 16
分辨率(位): 10 b
評(píng)估套件: 可供
數(shù)據(jù)接口: I²C,串行,SPI?
電壓基準(zhǔn): 外部
電源電壓: 1.8V,3.3V,5V
電流 - 電源: 4.6mA
工作溫度: -40°C ~ 85°C
安裝類(lèi)型: 表面貼裝
封裝/外殼: 32-VFQFN
供應(yīng)商設(shè)備封裝: 32-QFN
包裝: 標(biāo)準(zhǔn)包裝
產(chǎn)品目錄頁(yè)面: 2822 (CN2011-ZH PDF)
其它名稱(chēng): 427-1125-6
6.16 Setups Block
Table 6.1 Setups Table
Setups data is sent from the host to the QT using the I 2C interface. The setups block is memory mapped onto this interface. Thus each setup can be accessed by
reading/writing the appropriate address. Setups can be accessed individually or as a block. Before writing to any setup, an unlock code (value 0x55) must be written to the
setups write unlock address (130). Refer also to Table 6.2, page 22 for further details, and all of Section 6.
20
Range is in 100ms increments; 0 = disable, 1 = 100ms, default = 1s
10
24
8
0...255
DHT
Drift Hold Time
1
253
8
20
Range is in 100ms increments; 1 = 100ms. Default = 2.5s. 0 is illegal to use
25
24
8
1...255
AWAKE
Awake Timeout
1
252
7
20
19
Bits 2,1,0 = Sleep Duration, 8 values via LUT, default = 125ms
Bits 6 = Mains sync, negative edge, 1 = enabled, default = off
3
0
24
3
1
SLEEP = 0...7
MSYNC = 0,1
SLEEP
MSYNC
Sleep Duration
Mains Sync
1
251
6
20
19
Bit 3 = WAKE, 1 - enabled
Bits 5, 4 = BL, via LUT (Table 6.2 page 22), default = 48
Bit 6 = AKS, 1 - enabled
Bit 7 = Scope sync, 1 = enabled
1
2
0
1
2
1
WAKE = 0,1
BL = 0...3
AKS = 0,1
SSYNC = 0,1
WAKE
BL
AKS
SSYNC
Wake On Touch
Burst Length
AKS
Scope Sync
24
227...250
5
18
Range is in 0.5 sec increments; 0 = infinite, default = 10s
Range is {infinite, 0.5...127s}; 255 is illegal to use
20
1
8
0...254
NRD
Neg recal delay
24
203...226
4
18
Lower nibble = Normal DI Limit, values same as operand (0 = disabled burst)
For QT60160, only the first 16 locations are set to 2, the last eight are set to 0
Upper nibble = Fast DI Limit, values same as operand (0 does not work)
2
5
1
4
NDIL = 0...15
FDIL = 0...15
NDIL
FDIL
Normal DI Limit
Fast DI Limit
24
179...202
3
17
Upper nibble = Pos Drift comp - via LUT (Table 6.2, page 22)
4
1
4
PDRIFT = 0...15
PDRIFT
Pos Drift Comp
24
155...178
2
17
Lower nibble = Neg Threshold - take operand and add 4 to get value
Upper nibble = Neg Drift comp - via Lookup Table (LUT) (Table 6.2, page 22)
6
10
1
4
NTHR = 0...15
NDRIFT = 0...15
NTHR
NDRIFT
Neg thresh
Neg Drift Comp
24
131...154
1
Page
Description
Default
Value
Key
Scope
Bits
Valid Range
Symbol
Parameter
Bytes
Address
Item
lQ
21
QT60240-ISG R8.06/0906
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