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參數(shù)資料
| 型號： | QR0001 |
| 文件頁數(shù)： | 29/40頁 |
| 文件大小： | 440K |
| 代理商： | QR0001 |
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12.0 Power and Decoupling Issues
(Continued)
Following is a List of PCB Recommendations:
1. Use one ground plane and at least one V
CC
plane.
2. Use a range of decoupling capacitors values. These de-
coupling caps should be high Q factor chip capacitors
(chip caps have little parasitic inductance). The differing
QR port frequencies require decoupling over a range of
frequencies. The decoupling caps should not share vias
to the ground plane, as this would defeat the noise sup-
pression across the desired frequency range.
3. Decoupling caps should be placed as close to the device
power pins as possible. Extreme care should be taken
placing the Power Region 4 de-couple caps directly on
the power pins. These decoupling caps are recommend-
ed as 0.001
m
F and 0.01
m
F. The caps at the RxPort
(region 2) are recommended to be 2.2
m
F, 1-1.0
m
F, 1-
0.1
m
F, 2-0.01
m
F. These caps should be used as noise
barriers between this region and the high frequency ring
port region. Power region (3 and 1 combined) should
have 2-0.1
m
F, 2-0.01
m
F, and 680 pF close to the power
pins.
4. Care should be taken for ensuring RGCLK, TxCLK, and
RxCLK have clean transitions and no reflections or ring-
ing. Transmission line design techniques must be used.
As a rule of thumb, if the signal path electrical length
(propagation delay time) is greater than 0.125 times the
clock transition time, the line should be terminated.
29
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