Philips Semiconductors
PUCC3801
Current-mode PWM controller
Product data
Rev. 01 — 10 September 2001
9 of 16
9397 750 08419
Koninklijke Philips Electronics N.V. 2001. All rights reserved.
[1]
[2]
[3]
[4]
Measured at OUT pin.
Measured at COMP pin.
The amplifier output is connected to the PWM section by a voltage divider with a gain of 0.4 and an impedance of 100 k
.
The propagation delay is measured from the 50% point on the CSNS input voltage to the 90% point on the falling edge of the output
pulse. A HIGH of 1 V is generated on CSNS after every rising edge of V
OUT
.
With CSNS tied to ground, the duty cycle can be controlled by varying the voltage on COMP. V
SC(start)
is the voltage on COMP that
produces maximum duty cycle. V
SC(stop)
is the voltage on COMP at which the output pulses disappear.
The propagation delay is measured from the 50% point on the CSNS input voltage to the 90% point on the falling edge of the output
pulse. A HIGH of 1.65 V is generated on CSNS after every rising edge of V
OUT
.
These limits are not guaranteed. The values are based on simulation results only.
[5]
[6]
[7]
Current sense comparator
scaling of CSNS voltage to
COMP voltage
[3]
40
%
Z
i(CSNS)
τ
filter
t
PD(PWM)
input impedance at CSNS pin
input filter time constant
propagation delay from CSNS to
OUT via PWM
slope compensation start voltage V
CSNS
= 0 V; duty
f
in
= 1 MHz
100
320
300
k
ns
ns
V
COMP
= 1.4 V;
V
CSNS
= 1V pulsed
[4]
V
SC(start)
cycle = maximum
[5]
2.2
2.4
2.6
V
V
SC(stop)
slope compensation stop voltage V
CSNS
= 0 V; no
output pulses
[5]
0.3
0.5
0.6
V
Over-current sense comparator
V
th(CSNS)
comparator threshold voltage at
CSNS pin
t
PD(OC)
propagation delay from CSNS to
OUT via over-current comparator
V
FB
= 2 V
1.25
V
V
COMP
= 4 V;
V
CSNS
= 1.65 V;
pulsed
[6]
170
250
ns
Output
V
OL
V
OH
R
OH
LOW level output voltage
HIGH-level output voltage
HIGH-level output resistance
I
OUT
= 10 mA
V
DD
= 12 V
V
DD
= 12 V;
I
OUT
= 10 mA
V
DD
= 12 V;
I
OUT
= 10 mA
C
L
= 2 nF; 10% to
90%
C
L
= 2 nF; 90% to
10%
30
0.06
V
DD
65
1.7
90
V
V
R
OL
LOW-level output resistance
1
7
14
t
o(r)
output rise time
[7]
60
160
260
ns
t
o(f)
output fall time
[7]
50
150
250
ns
Table 4:
V
DD
= 12 V; CSNS = LOW; C
load
= 2000 pF; C
REG
= 100 nF (REG to GND); T
amb
= 0 to 105
°
C; unless otherwise specified.
Symbol
Parameter
Conditions
Characteristics
…continued
Min
Typ
Max
Unit
V
COMP
-----------------